 Sam (Kesen Li)andXiaowei Wang
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5b2e2750b5
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Enable XQA for SM90 and SM120 (#17115)
Co-authored-by: Xiaowei Wang <100599594+xiaoweiw-nv@users.noreply.github.com>
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2026-03-03 14:09:44 -08:00 |
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Sam (Kesen Li)
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5194eef88b
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[Fix] A followup fix for TRTLLM BF16 MoE (#15303)
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2026-02-26 17:14:20 -08:00 |
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Sam (Kesen Li)
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81449b4bee
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Optimize GDN decode for Qwen3 Next (#17094)
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2026-01-31 01:02:12 +08:00 |
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Sam
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4eda4194f2
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[Fix] Disable trtllm moe backend for draft model for a qucik fix (#15002)
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2025-12-12 23:58:47 -08:00 |
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Sam
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d7ed8a8c24
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[NVIDIA] Enable TRTLLM BF16 MoE on Blackwell GPUs (#13798)
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2025-12-11 22:56:13 -08:00 |
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Sam
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922756aaa1
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[FIX] trtllm-moe-fp4-renorm for Qwen series models (#14350)
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2025-12-04 12:52:21 -08:00 |
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SamandKaixi Hou
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91e8dc371a
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[Feat][NVFP4] Enable NVFP4 MoE for Qwen series models (eg. Qwen3-Next) #13761 (#13761)
Co-authored-by: Kaixi Hou <kaixih@nvidia.com>
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2025-11-26 17:53:45 -07:00 |
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Sam
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e7e89349c9
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Enable Flashinfer TRTLLM-GEN-MoE FP8 blockwise kernel for Qwen3-Next on Blackwell (#12543)
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2025-11-13 19:44:44 +08:00 |
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Sam
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3594815a8b
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Re-enable Flashinfer TRTLLM GEN MHA and Add Unit Test (#12885)
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2025-11-10 20:17:43 -08:00 |
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