Commit Graph

7593 Commits

Author SHA1 Message Date
b8zhong
32f8b6064e improve default glm mtp setting (#14457)
Signed-off-by: Brayden Zhong <b8zhong@users.noreply.github.com>
2025-12-08 13:27:13 -08:00
Yuhao Yang
b9bef31a15 fix: use .get() when accessing strict mem-check env variable (#14657) 2025-12-08 13:25:42 -08:00
Simo Lin
8550822d6b [model-gateway] Optimize memory usage in HTTP router (#14667) 2025-12-08 13:10:31 -08:00
Mick
8810152e88 vlm: Use fa3 as the default backend for qwen3 vl (#14634) 2025-12-08 12:56:20 -08:00
Simo Lin
7bf16c6339 [model-gateway] fix WASM arbitrary file read security vol (#14664) 2025-12-08 12:11:16 -08:00
Simo Lin
39f9a9c2a5 [model-gateway] reduce cpu overhead in grpc router (#14663) 2025-12-08 11:54:56 -08:00
Simo Lin
d69ecc19b8 [model-gateway] reducing cpu overhead in various of places (#14658) 2025-12-08 09:44:40 -08:00
yctseng0211
763888b5a8 [AMD] change fused rms quant interface for aiter upgrade (#14497) 2025-12-08 09:09:23 -08:00
sglang-bot
9a327bdfcf chore: bump SGLang version to 0.5.6.post1 (#14651) 2025-12-09 00:35:28 +08:00
sglang-bot
2de98010b5 chore: bump sgl-kernel version to 0.3.19 (#14649) 2025-12-08 22:53:08 +08:00
Yuhao Yang
8200fb56cb update transformers package version to 5.0.0rc0 (#14356) 2025-12-08 22:46:01 +08:00
fzyzcjy
cb4cdb43a4 Fix dp-aware incompatible with service-discovery (#14629) 2025-12-08 06:39:27 -08:00
Mick
80cfca50bc [diffusion] chore: further refine output resolution adjustment logic (#14558)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
2025-12-08 19:08:38 +08:00
Yibo Cai
7871593cc8 [cpu] Implement all gather/reduce for arm64 cpu (#12527) 2025-12-08 19:03:04 +08:00
sglang-bot
4a62a0e3cd chore: bump sgl-kernel version to 0.3.19 (#14632) 2025-12-08 19:02:24 +08:00
Prozac614
12a08efc20 [diffusion] feat: add support for LoRA layers in transformer_2 within LoRAPipeline (#14606) 2025-12-08 17:57:13 +08:00
Muqi Li
06836ad02a [Reasoning + Structured Output] make reasoning compatible with structured output (#12551)
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
2025-12-08 01:28:39 -08:00
Yuhao Yang
f72a77038f modify the sgl-kernel to be compatible with transformers 5.x. (#14625) 2025-12-08 00:39:00 -08:00
Qiaolin Yu
aeff0d386b Fix amd rope definition (#14556) 2025-12-07 23:47:03 -08:00
Binyao Jiang
cf0478d602 [Glm46v] Bug fix for accuracy drop and unable to launch server (#14585)
Co-authored-by: yhyang201 <yhyang201@gmail.com>
Co-authored-by: zRzRzRzRzRzRzR <2448370773@qq.com>
Co-authored-by: Minglei Zhu <mingleizhu1122@gmail.com>
2025-12-07 23:45:02 -08:00
fzyzcjy
a2ca9bd4f1 Super tiny fix unused code in router (#14618) 2025-12-07 23:12:09 -08:00
Tiwei Bie
36361adcbf [DLLM] Add initial cuda graph support (#14203) 2025-12-08 14:12:35 +08:00
Qiaolin Yu
661e9775d0 [2/2] Add rope kernel in sgl-kernel (#14452) 2025-12-07 21:37:29 -08:00
Simo Lin
2970f22917 [model-gateway] fix WASM unbounded request/response body read vuln (#14612) 2025-12-07 20:47:25 -08:00
fzyzcjy
c08b780fe0 Super tiny remove unused select_worker_pair (#14609) 2025-12-07 20:32:38 -08:00
Simo Lin
8fbf7dd56f [model-gateway] refactor otel to be more efficient (#14604) 2025-12-07 20:09:25 -08:00
fzyzcjy
1915a1f8a7 Super tiny remove unneeded policy flag (#14608) 2025-12-07 19:35:07 -08:00
fzyzcjy
85d0ccfac0 Tiny fix missing policy decision recording (#14605) 2025-12-07 19:24:27 -08:00
Simo Lin
a4ffd665c0 [model-gateway] fix WASM memory limit per module (#14600) 2025-12-07 19:15:19 -08:00
Alison Shao
559202b544 [CI] Fix unit-test-backend-8-gpu-b200 running on every /rerun-stage (#14591) 2025-12-07 18:42:04 -08:00
Nicholas
f57d4fe78e [feat] use cachebuffer to store mm feature to speedup hash (#14386) 2025-12-08 10:35:20 +08:00
wentx
b7b7524e95 [Tool Call] Fix DeepSeekV32Detector skipping functions with no params in streaming mode (#14573) 2025-12-07 18:32:10 -08:00
Baizhou Zhang
6799847ebf [CI]Unblock and split spec v2+dp test (#14551) 2025-12-07 17:39:25 -08:00
Xiaoyu Zhang
03b835e7d1 Refactor tuning block wise kernel and opt Qwen/Qwen3-VL-32B-Instruct-FP8 (#14141) 2025-12-08 09:24:58 +08:00
Simo Lin
aff1238ef2 [model-gateway] reorganize metrics, logging, and otel to its own module (#14590) 2025-12-07 16:50:39 -08:00
Simo Lin
5e2cda6158 [model-gateway] Fixed WASM Security Vulnerability - Execution Timeout (#14588) 2025-12-07 16:05:53 -08:00
Simo Lin
b0bbc7f53d [model-gateway] extra accumulator and tool handler in oai router (#14587) 2025-12-07 15:52:12 -08:00
Baizhou Zhang
673c11ba73 [Minor] Temporarily skipping deepep large mtp test (#14586) 2025-12-07 13:59:16 -08:00
b8zhong
3b47973af8 [CI] Tiny speed up VLM CI (#14517)
Co-authored-by: Brayden Zhong <b8zhong@users.noreply.github.com>
2025-12-07 13:30:41 -08:00
Zhiyu
f6423b626c Rename TensorRT Model Optimizer to Model Optimizer (#14455)
Signed-off-by: Zhiyu Cheng <zhiyuc@nvidia.com>
2025-12-07 13:18:20 -08:00
Hudson Xing
84efe54bc4 Fix FP8 KV Triton type issue and add regression test (#14553) 2025-12-07 10:51:46 -08:00
khalilzhk
948b6acee8 [BugFix] fix prefixcache performance and accuracy on ascend (#13573) 2025-12-08 02:16:20 +08:00
Vladimir Serov
f124539a01 [NPU]LoRA: Adding Torch Native backend (#14132) 2025-12-08 02:16:07 +08:00
AichenF
c8683ae305 [diffusion] cli: profiling utilities support (#14185)
Co-authored-by: jianyingzhu <53300651@qq.com>
Co-authored-by: Jianying <53503712+jianyingzhu@users.noreply.github.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
2025-12-08 00:59:45 +08:00
Liangsheng Yin
125e17efd5 Add small model test for spec v2 + dp + trtllm_mla (#14576) 2025-12-07 23:55:00 +08:00
Liangsheng Yin
88c459c6c8 Tiny remove wrong import from python.sglang (#14577) 2025-12-07 22:07:49 +08:00
Xiaoyu Zhang
ae6a6630e4 Add Expert Parallelism (EP) support for kimi-k2-thinking (#13725) 2025-12-07 20:28:57 +08:00
Yuan Luo
26d95008b6 [apply][2/2] Fused qk_norm_rope for Qwen3-MoE (#13998)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-12-07 20:25:18 +08:00
Alison Shao
f2b5dcc976 Add unit-test-backend-8-gpu-b200 to rerun-stage command (#14569) 2025-12-07 19:09:07 +08:00
Tiwei Bie
9abcab3ffa [DLLM] feat: Add threshold based parallel decoding support (#14412)
Co-authored-by: Jinwei Yao <jinweiy@illinois.edu>
Co-authored-by: 赵晨阳 <zhaochen20@outlook.com>
2025-12-07 18:25:33 +08:00