595 lines
18 KiB
C++
595 lines
18 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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/*! \file
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\brief Epilogue for threadblock scoped GEMMs using Tensor Ops optimized for mixed-precision.
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This assumes the shared memory tile is in a permuted layout which avoids bank conflicts on loading.
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When the fragment is loaded into registers, it matches the row-major thread map assumed by
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the predicated tile iterator writing to global memory.
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The epilogue rearranges the result of a matrix product through shared memory to match canonical
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tensor layouts in global memory. Epilogues support conversion and reduction operations.
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*/
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#pragma once
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#include "cutlass/cutlass.h"
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#include "cutlass/numeric_types.h"
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#include "cutlass/array.h"
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#include "cutlass/layout/matrix.h"
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#include "cutlass/matrix_shape.h"
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#include "cutlass/tensor_ref.h"
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#include "cutlass/epilogue/threadblock/output_tile_thread_map.h"
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/////////////////////////////////////////////////////////////////////////////////////////////////
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namespace cutlass {
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namespace epilogue {
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namespace threadblock {
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Tile iterator used to load output tile from shared memory in epilogue.
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///
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/// Satisfies: ReadableTileIterator
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///
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template <
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typename ThreadMap_, ///< Thread map (conept: OutputTileThreadMap)
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typename Element_, ///< Accumulator data type
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int ElementSizeBits_, ///< Size of accumulator in bits
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int OutputSizeBits_, ///< Size of output element in bits
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int ElementsPerAccess, ///< Vector length of output vector
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int ContiguousLanes, ///< Number of lanes in the warp writing to contiguous elements
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/// in the global memory tensor
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bool EightBitsOutputOrLess = (OutputSizeBits_ <= 8)
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>
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class SharedLoadIteratorMixed;
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Tile iterator used to load output tile from shared memory in epilogue.
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///
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/// Satisfies: ReadableTileIterator
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///
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template <
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typename ThreadMap_, ///< Thread map (conept: OutputTileThreadMap)
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typename Element_ ///< Accumulator data type
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>
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class SharedLoadIteratorMixed<ThreadMap_, Element_, 32, 16, 8, 8, false> {
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public:
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using ThreadMap = ThreadMap_;
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using Shape = typename ThreadMap::Shape;
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using Element = Element_;
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using Layout = layout::RowMajor;
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using TensorRef = TensorRef<Element, Layout>;
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using ConstTensorRef = typename TensorRef::ConstTensorRef;
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using Index = typename Layout::Index;
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using LongIndex = typename Layout::LongIndex;
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using TensorCoord = MatrixCoord;
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static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
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static int const kAlignment = ThreadMap::kElementsPerAccess * sizeof_bits<Element_>::value / 8;
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static int const kThreads = ThreadMap::kThreads;
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/// Fragment object
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using Fragment = Array<
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Element,
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ThreadMap::Iterations::kColumn *
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ThreadMap::Iterations::kRow *
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ThreadMap::Iterations::kGroup *
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ThreadMap::Iterations::kCluster *
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ThreadMap::kElementsPerAccess>;
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/// Memory access size
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using AccessType = AlignedArray<
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Element,
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ThreadMap::kElementsPerAccess,
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kAlignment>;
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/// Vector type used for SMEM loads
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using LoadType = AlignedArray<
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Element,
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const_min(128 / sizeof_bits<Element>::value, ThreadMap::kElementsPerAccess),
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const_min(16, kAlignment)
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>;
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static int const kLoadsPerAccess = AccessType::kElements / LoadType::kElements;
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private:
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//
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// Data members
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//
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/// Byte-level pointer
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LoadType const *pointers_[kLoadsPerAccess];
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/// Stride along adjacent rows in units of LoadType
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int stride_;
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public:
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//
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// Methods
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//
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/// Constructor
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CUTLASS_DEVICE
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SharedLoadIteratorMixed(
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TensorRef ref,
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int thread_idx
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):
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stride_((ref.stride(0) / LoadType::kElements)) {
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TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx);
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// Initialize pointers
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] = reinterpret_cast<LoadType const *>(ref.data());
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int col_idx = (thread_offset.column() / kElementsPerAccess) * kLoadsPerAccess;
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int bank_offset = (col_idx * int(sizeof(LoadType)) / 128) % kLoadsPerAccess;
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col_idx += (bank_offset + i) % kLoadsPerAccess;
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pointers_[i] += thread_offset.row() * stride_ + col_idx;
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}
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}
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/// Adds a pointer offset in units of Element
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CUTLASS_HOST_DEVICE
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void add_pointer_offset(LongIndex pointer_offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] += pointer_offset / LoadType::kElements;
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}
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}
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CUTLASS_DEVICE
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void add_tile_offset(TensorCoord const &offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] +=
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offset.row() * Shape::kRow * stride_ +
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offset.column() * Shape::kColumn / LoadType::kElements;
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}
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}
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/// Loads a fragment from memory
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CUTLASS_DEVICE
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void load_with_pointer_offset(Fragment &frag, Index pointer_offset) const {
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CUTLASS_PRAGMA_UNROLL
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for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
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CUTLASS_PRAGMA_UNROLL
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for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
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CUTLASS_PRAGMA_UNROLL
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for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
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int row_ptr_offset =
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row * ThreadMap::Delta::kRow * stride_ +
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group * ThreadMap::Delta::kGroup* stride_ +
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cluster * ThreadMap::Delta::kCluster * stride_ +
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pointer_offset / LoadType::kElements;
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int frag_row_idx = (row + ThreadMap::Iterations::kRow * (group + ThreadMap::Iterations::kGroup * cluster));
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LoadType *frag_ptr = reinterpret_cast<LoadType *>(&frag);
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CUTLASS_PRAGMA_UNROLL
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for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
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int frag_idx = frag_row_idx * ThreadMap::Iterations::kColumn + column;
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CUTLASS_PRAGMA_UNROLL
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for (int v = 0; v < kLoadsPerAccess; ++v) {
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int vector_idx = (column * ThreadMap::Delta::kColumn / kElementsPerAccess * kLoadsPerAccess);
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LoadType const *memory_pointer = pointers_[v] + row_ptr_offset;
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frag_ptr[frag_idx * kLoadsPerAccess + v] = memory_pointer[vector_idx];
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}
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}
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}
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}
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}
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}
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/// Set base smem address
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CUTLASS_DEVICE
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void set_smem_base_address(Index address) {}
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/// Loads a fragment
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CUTLASS_DEVICE
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void load(Fragment &frag) const {
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load_with_pointer_offset(frag, 0);
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}
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};
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Partial specialization for
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/// int32_t x 16 => int8_t/int4b_t x 16 and
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/// float x 16 => float_e4m3_t/float_e5m2_t x 16
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template <
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typename ThreadMap_, ///< Thread map (concept: OutputTileThreadMap)
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typename Element_,
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int OutputSizeBits_ ///< Size of output element in bits
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>
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class SharedLoadIteratorMixed<ThreadMap_, Element_, 32, OutputSizeBits_, 16, 8, true> {
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public:
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using ThreadMap = ThreadMap_;
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using Shape = typename ThreadMap::Shape;
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using Element = Element_;
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static_assert(sizeof_bits<Element>::value == 32, "Element size in bits must be 32.");
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using Layout = layout::RowMajor;
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using TensorRef = TensorRef<Element, Layout>;
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using ConstTensorRef = typename TensorRef::ConstTensorRef;
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using Index = typename Layout::Index;
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using LongIndex = typename Layout::LongIndex;
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using TensorCoord = MatrixCoord;
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static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
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static int const kAlignment = 16;
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static int const kThreads = ThreadMap::kThreads;
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/// Fragment object
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using Fragment = Array<
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Element,
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ThreadMap::Iterations::kColumn *
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ThreadMap::Iterations::kRow *
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ThreadMap::Iterations::kGroup *
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ThreadMap::Iterations::kCluster *
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ThreadMap::kElementsPerAccess>;
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/// Memory access size
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using AccessType = AlignedArray<
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Element,
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16,
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kAlignment>;
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/// Vector type used for SMEM loads
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using LoadType = AlignedArray<
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Element,
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4,
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16
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>;
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static int const kLoadsPerAccess = 4;
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private:
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//
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// Data members
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//
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/// Byte-level pointer
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LoadType const *pointers_[kLoadsPerAccess];
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/// Stride along adjacent rows in units of LoadType
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int stride_;
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public:
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//
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// Methods
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//
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/// Constructor
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CUTLASS_DEVICE
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SharedLoadIteratorMixed(
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TensorRef ref,
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int thread_idx
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):
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stride_((ref.stride(0) / LoadType::kElements)) {
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TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx);
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// Initialize pointers
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LoadType const *base_ptr = reinterpret_cast<LoadType const *>(ref.data()) + thread_offset.row() * stride_;
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int lane_col_idx = thread_offset.column() / 16;
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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int lane_offset = (lane_col_idx % 2) * 4 | ((lane_col_idx / 2) * 8) | ((lane_col_idx / 2) ^ i);
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pointers_[i] = base_ptr + lane_offset;
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}
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}
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/// Adds a pointer offset in units of Element
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CUTLASS_HOST_DEVICE
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void add_pointer_offset(LongIndex pointer_offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] += pointer_offset / LoadType::kElements;
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}
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}
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CUTLASS_DEVICE
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void add_tile_offset(TensorCoord const &offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] +=
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offset.row() * Shape::kRow * stride_ +
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offset.column() * Shape::kColumn / LoadType::kElements;
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}
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}
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/// Loads a fragment from memory
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CUTLASS_DEVICE
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void load_with_pointer_offset(Fragment &frag, Index pointer_offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
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CUTLASS_PRAGMA_UNROLL
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for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
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CUTLASS_PRAGMA_UNROLL
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for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
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int row_ptr_offset =
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row * ThreadMap::Delta::kRow * stride_ +
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group * ThreadMap::Delta::kGroup* stride_ +
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cluster * ThreadMap::Delta::kCluster * stride_ +
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pointer_offset / LoadType::kElements;
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int frag_row_idx = (row + ThreadMap::Iterations::kRow * (group + ThreadMap::Iterations::kGroup * cluster));
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LoadType *frag_ptr = reinterpret_cast<LoadType *>(&frag);
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CUTLASS_PRAGMA_UNROLL
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for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
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int frag_idx = frag_row_idx * ThreadMap::Iterations::kColumn + column;
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CUTLASS_PRAGMA_UNROLL
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for (int v = 0; v < kLoadsPerAccess; ++v) {
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LoadType const *memory_pointer = pointers_[v];
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frag_ptr[frag_idx * kLoadsPerAccess + v] = memory_pointer[row_ptr_offset];
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}
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}
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}
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}
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}
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}
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/// Set base smem address
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CUTLASS_DEVICE
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void set_smem_base_address(Index address) {}
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/// Loads a fragment
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CUTLASS_DEVICE
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void load(Fragment &frag) {
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load_with_pointer_offset(frag, 0);
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}
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};
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Partial specialization for:
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/// int32_t x 8 => int8_t/int4b_t x 8 and
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/// float x 8 => float_e4m3_t/float_e5m2_t x 8
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template <
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typename ThreadMap_, ///< Thread map (concept: OutputTileThreadMap)
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typename Element_,
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int OutputSizeBits_
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>
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class SharedLoadIteratorMixed<ThreadMap_, Element_, 32, OutputSizeBits_, 8, 8, true> {
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public:
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using ThreadMap = ThreadMap_;
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using Shape = typename ThreadMap::Shape;
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using Element = Element_;
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static_assert(sizeof_bits<Element>::value == 32, "Element size in bits must be 32.");
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using Layout = layout::RowMajor;
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using TensorRef = TensorRef<Element, Layout>;
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using ConstTensorRef = typename TensorRef::ConstTensorRef;
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using Index = typename Layout::Index;
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using LongIndex = typename Layout::LongIndex;
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using TensorCoord = MatrixCoord;
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static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
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static int const kAlignment = 8;
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static int const kThreads = ThreadMap::kThreads;
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/// Fragment object
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using Fragment = Array<
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Element,
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ThreadMap::Iterations::kColumn *
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ThreadMap::Iterations::kRow *
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ThreadMap::Iterations::kGroup *
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ThreadMap::Iterations::kCluster *
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ThreadMap::kElementsPerAccess>;
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/// Memory access size
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using AccessType = AlignedArray<
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Element,
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8,
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kAlignment>;
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/// Vector type used for SMEM loads
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using LoadType = AlignedArray<
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Element,
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4,
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16
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>;
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static int const kLoadsPerAccess = 2;
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private:
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//
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// Data members
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//
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/// Byte-level pointer
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LoadType const *pointers_[kLoadsPerAccess];
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/// Stride along adjacent rows in units of LoadType
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int stride_;
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public:
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//
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// Methods
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//
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/// Constructor
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CUTLASS_DEVICE
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SharedLoadIteratorMixed(
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TensorRef ref,
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int thread_idx
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):
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stride_((ref.stride(0) / LoadType::kElements)) {
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TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx);
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// Initialize pointers
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LoadType const *base_ptr = reinterpret_cast<LoadType const *>(ref.data()) + thread_offset.row() * stride_;
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int lane_col_idx = thread_offset.column() / 8;
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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int lane_offset = (lane_col_idx % 8) * 2 | ((lane_col_idx / 4) ^ i);
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pointers_[i] = base_ptr + lane_offset;
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}
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}
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/// Adds a pointer offset in units of Element
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CUTLASS_HOST_DEVICE
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void add_pointer_offset(LongIndex pointer_offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] += pointer_offset / LoadType::kElements;
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}
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}
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CUTLASS_DEVICE
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void add_tile_offset(TensorCoord const &offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int i = 0; i < kLoadsPerAccess; ++i) {
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pointers_[i] +=
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offset.row() * Shape::kRow * stride_ +
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offset.column() * Shape::kColumn / LoadType::kElements;
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}
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}
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/// Loads a fragment from memory
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CUTLASS_DEVICE
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void load_with_pointer_offset(Fragment &frag, Index pointer_offset) {
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CUTLASS_PRAGMA_UNROLL
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for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
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CUTLASS_PRAGMA_UNROLL
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for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
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CUTLASS_PRAGMA_UNROLL
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for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
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|
|
int row_ptr_offset =
|
|
row * ThreadMap::Delta::kRow * stride_ +
|
|
group * ThreadMap::Delta::kGroup* stride_ +
|
|
cluster * ThreadMap::Delta::kCluster * stride_ +
|
|
pointer_offset / LoadType::kElements;
|
|
|
|
int frag_row_idx = (row + ThreadMap::Iterations::kRow * (group + ThreadMap::Iterations::kGroup * cluster));
|
|
|
|
LoadType *frag_ptr = reinterpret_cast<LoadType *>(&frag);
|
|
|
|
CUTLASS_PRAGMA_UNROLL
|
|
for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
|
|
|
|
int frag_idx = frag_row_idx * ThreadMap::Iterations::kColumn + column;
|
|
|
|
CUTLASS_PRAGMA_UNROLL
|
|
for (int v = 0; v < kLoadsPerAccess; ++v) {
|
|
|
|
LoadType const *memory_pointer = pointers_[v];
|
|
|
|
frag_ptr[frag_idx * kLoadsPerAccess + v] = memory_pointer[row_ptr_offset];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Set base smem address
|
|
CUTLASS_DEVICE
|
|
void set_smem_base_address(Index address) {}
|
|
|
|
/// Loads a fragment
|
|
CUTLASS_DEVICE
|
|
void load(Fragment &frag) {
|
|
|
|
load_with_pointer_offset(frag, 0);
|
|
}
|
|
};
|
|
|
|
/////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
} // namespace threadblock
|
|
} // namespace epilogue
|
|
} // namespace cutlass
|
|
|
|
/////////////////////////////////////////////////////////////////////////////////////////////////
|