v4.1 release update v2. (#2481)
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@@ -90,18 +90,17 @@ If you already know the TV layout you want to use for your tiled copy, CuTe DSL
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# Tile input tensor to thread blocks: ((TileM,TileN),(RestM,RestN))
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gA = cute.zipped_divide(mA, tiler_mn)
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where `tiler_mn` is the tile size per thread block and `tv_layout` is the TV layout which maps
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thread index and inter-thread index of data array per thread to logical coordinates of elements in
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input and output tensors.
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Then we can build tiled copy for input and output tensors with `cute.make_tiled_copy` utility.
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Then we can build tiled copy for input and output tensors with `cute.make_tiled_copy_tv` utility, which
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infers the tiler and tv layout for the tiled copy automatically, where `tiler` is the tile size per thread
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block and `tv_layout` is the TV layout which maps thread index and inter-thread index of data array per
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thread to logical coordinates of elements in input and output tensors.
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.. code-block:: python
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blkA = gA[((None, None), bidx)] # (TileM,TileN)
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copy_atom_load = cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), gA.element_type)
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tiled_copy_A = cute.make_tiled_copy(copy_atom_load, tv_layout, tiler_mn)
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tiled_copy_A = cute.make_tiled_copy_tv(copy_atom_load, thr_layout, val_layout)
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# get slice of tiled_copy_A for current thread
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thr_copy_A = tiled_copy_A.get_slice(tidx)
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@@ -140,8 +139,8 @@ def elementwise_add_kernel(
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gC: cute.Tensor,
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cC: cute.Tensor, # coordinate tensor
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shape: cute.Shape,
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tv_layout: cute.Layout,
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tiler_mn: cute.Shape,
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thr_layout: cute.Layout,
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val_layout: cute.Layout,
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):
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tidx, _, _ = cute.arch.thread_idx()
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bidx, _, _ = cute.arch.block_idx()
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@@ -165,9 +164,9 @@ def elementwise_add_kernel(
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copy_atom_load = cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), gA.element_type)
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copy_atom_store = cute.make_copy_atom(cute.nvgpu.CopyUniversalOp(), gC.element_type)
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tiled_copy_A = cute.make_tiled_copy(copy_atom_load, tv_layout, tiler_mn)
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tiled_copy_B = cute.make_tiled_copy(copy_atom_load, tv_layout, tiler_mn)
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tiled_copy_C = cute.make_tiled_copy(copy_atom_store, tv_layout, tiler_mn)
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tiled_copy_A = cute.make_tiled_copy_tv(copy_atom_load, thr_layout, val_layout)
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tiled_copy_B = cute.make_tiled_copy_tv(copy_atom_load, thr_layout, val_layout)
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tiled_copy_C = cute.make_tiled_copy_tv(copy_atom_store, thr_layout, val_layout)
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thr_copy_A = tiled_copy_A.get_slice(tidx)
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thr_copy_B = tiled_copy_B.get_slice(tidx)
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@@ -254,7 +253,7 @@ def elementwise_add(mA, mB, mC, copy_bits: cutlass.Constexpr = 128):
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cC = cute.zipped_divide(idC, tiler=tiler_mn)
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print(f"[DSL INFO] coord tensor = {cC.type}")
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elementwise_add_kernel(gA, gB, gC, cC, mC.shape, tv_layout, tiler_mn).launch(
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elementwise_add_kernel(gA, gB, gC, cC, mC.shape, thr_layout, val_layout).launch(
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grid=[cute.size(gC, mode=[1]), 1, 1],
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block=[cute.size(tv_layout, mode=[0]), 1, 1],
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)
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@@ -362,7 +361,7 @@ def run_elementwise_add(
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workspace_generator=generate_tensors,
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workspace_count=10,
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warmup_iterations=warmup_iterations,
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profiling_iterations=iterations,
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iterations=iterations,
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)
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# Print execution results
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