CUTLASS 2.0 (#62)
CUTLASS 2.0 Substantially refactored for - Better performance, particularly for native Turing Tensor Cores - Robust and durable templates spanning the design space - Encapsulated functionality embodying modern C++11 programming techniques - Optimized containers and data types for efficient, generic, portable device code Updates to: - Quick start guide - Documentation - Utilities - CUTLASS Profiler Native Turing Tensor Cores - Efficient GEMM kernels targeting Turing Tensor Cores - Mixed-precision floating point, 8-bit integer, 4-bit integer, and binarized operands Coverage of existing CUTLASS functionality: - GEMM kernels targeting CUDA and Tensor Cores in NVIDIA GPUs - Volta Tensor Cores through native mma.sync and through WMMA API - Optimizations such as parallel reductions, threadblock rasterization, and intra-threadblock reductions - Batched GEMM operations - Complex-valued GEMMs Note: this commit and all that follow require a host compiler supporting C++11 or greater.
This commit is contained in:
Andrew Kerr
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/***************************************************************************************************
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* * Neither the name of the NVIDIA CORPORATION nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TOR (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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/*! \file
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\brief Template for GEMM performing a reduction over K partitions in parallel.
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*/
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#pragma once
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#include "cutlass/cutlass.h"
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#include "cutlass/gemm/gemm.h"
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#include "cutlass/matrix_coord.h"
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/////////////////////////////////////////////////////////////////////////////////////////////////
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namespace cutlass {
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namespace gemm {
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namespace kernel {
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/////////////////////////////////////////////////////////////////////////////////////////////////
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template <
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typename Mma_, ///! Threadblock-scoped matrix multiply-accumulate
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typename Epilogue_, ///! Epilogue
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typename ThreadblockSwizzle_ ///! Threadblock swizzling function
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>
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struct GemmSplitKParallel {
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using Mma = Mma_;
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using Epilogue = Epilogue_;
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using OutputOp = typename Epilogue::OutputOp;
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using ThreadblockSwizzle = ThreadblockSwizzle_;
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/// Warp count (concept: GemmShape)
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using WarpCount = typename Mma::WarpCount;
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static int const kThreadCount = 32 * WarpCount::kCount;
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static int const kAlignmentK = Mma::Operator::Shape::kK;
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/// Parameters structure
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struct Params {
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cutlass::gemm::GemmCoord problem_size;
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cutlass::gemm::GemmCoord grid_tiled_shape;
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typename Mma::IteratorA::Params params_A;
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typename Mma::IteratorA::TensorRef ref_A;
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typename Mma::IteratorB::Params params_B;
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typename Mma::IteratorB::TensorRef ref_B;
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typename Epilogue::OutputTileIterator::Params params_D;
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typename Epilogue::OutputTileIterator::TensorRef ref_D;
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typename OutputOp::Params output_op;
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int64_t splitk_slice_stride;
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int gemm_k_size;
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//
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// Methods
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//
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CUTLASS_HOST_DEVICE
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Params() { }
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CUTLASS_HOST_DEVICE
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Params(
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cutlass::gemm::GemmCoord const & problem_size,
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cutlass::gemm::GemmCoord const & grid_tiled_shape,
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typename Mma::IteratorA::TensorRef ref_A,
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typename Mma::IteratorB::TensorRef ref_B,
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typename Epilogue::OutputTileIterator::TensorRef ref_D,
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typename OutputOp::Params output_op,
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int64_t splitk_slice_stride
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):
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problem_size(problem_size),
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grid_tiled_shape(grid_tiled_shape),
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params_A(ref_A.layout()),
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ref_A(ref_A),
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params_B(ref_B.layout()),
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ref_B(ref_B),
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params_D(ref_D.layout()),
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ref_D(ref_D),
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output_op(output_op),
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splitk_slice_stride(splitk_slice_stride) {
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int full_gemm_k_iterations = problem_size.k() / Mma::Shape::kK;
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int gemm_k_iterations = full_gemm_k_iterations / grid_tiled_shape.k();
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gemm_k_size = gemm_k_iterations * Mma::Shape::kK;
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}
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};
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/// Shared memory storage structure
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union SharedStorage {
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typename Mma::SharedStorage main_loop;
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typename Epilogue::SharedStorage epilogue;
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};
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//
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// Methods
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//
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CUTLASS_HOST_DEVICE
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GemmSplitKParallel() { }
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/// Executes one GEMM
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CUTLASS_DEVICE
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void operator()(Params const ¶ms, SharedStorage &shared_storage) {
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// Compute threadblock location
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ThreadblockSwizzle threadblock_swizzle;
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cutlass::gemm::GemmCoord threadblock_tile_offset = threadblock_swizzle.get_tile_offset();
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// Early exit if CTA is out of range
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if (params.grid_tiled_shape.m() <= threadblock_tile_offset.m() ||
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params.grid_tiled_shape.n() <= threadblock_tile_offset.n()) {
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return;
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}
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// Compute initial location in logical coordinates
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cutlass::MatrixCoord tb_offset_A{
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threadblock_tile_offset.m() * Mma::Shape::kM,
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threadblock_tile_offset.k() * params.gemm_k_size,
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};
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cutlass::MatrixCoord tb_offset_B{
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threadblock_tile_offset.k() * params.gemm_k_size,
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threadblock_tile_offset.n() * Mma::Shape::kN
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};
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// Problem size is a function of threadblock index in the K dimension
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int problem_size_k;
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if (threadblock_tile_offset.k() + 1 == params.grid_tiled_shape.k()) {
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problem_size_k = params.problem_size.k();
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}
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else {
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problem_size_k = (threadblock_tile_offset.k() + 1) * params.gemm_k_size;
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}
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// Compute threadblock-scoped matrix multiply-add
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int gemm_k_iterations = (problem_size_k - tb_offset_A.column() + Mma::Shape::kK - 1) / Mma::Shape::kK;
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// Compute position within threadblock
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int thread_idx = threadIdx.x;
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// Construct iterators to A and B operands
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typename Mma::IteratorA iterator_A(
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params.params_A,
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params.ref_A.data(),
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{params.problem_size.m(), problem_size_k},
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thread_idx,
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tb_offset_A);
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typename Mma::IteratorB iterator_B(
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params.params_B,
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params.ref_B.data(),
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{problem_size_k, params.problem_size.n()},
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thread_idx,
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tb_offset_B);
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int warp_idx = threadIdx.x / 32;
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int lane_idx = threadIdx.x % 32;
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//
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// Main loop
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//
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// Construct thread-scoped matrix multiply
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Mma mma(shared_storage.main_loop, thread_idx, warp_idx, lane_idx);
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typename Mma::FragmentC accumulators;
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accumulators.clear();
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mma(gemm_k_iterations, accumulators, iterator_A, iterator_B, accumulators);
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//
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// Epilogue
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//
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OutputOp output_op(params.output_op);
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//
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// Masked tile iterators constructed from members
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//
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threadblock_tile_offset = threadblock_swizzle.get_tile_offset();
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//assume identity swizzle
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MatrixCoord threadblock_offset(
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threadblock_tile_offset.m() * Mma::Shape::kM,
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threadblock_tile_offset.n() * Mma::Shape::kN
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);
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// Tile iterator writing to output tile
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typename Epilogue::OutputTileIterator iterator_D(
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params.params_D,
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params.ref_D.data(),
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params.problem_size.mn(),
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thread_idx,
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threadblock_offset
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);
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iterator_D.add_pointer_offset(params.splitk_slice_stride * threadblock_tile_offset.k());
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// Execute the epilogue
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Epilogue epilogue(
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shared_storage.epilogue,
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thread_idx,
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warp_idx,
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lane_idx);
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// Run efficient epilogue
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epilogue(output_op, iterator_D, accumulators, iterator_D);
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}
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};
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/////////////////////////////////////////////////////////////////////////////////////////////////
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} // namespace kernel
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} // namespace gemm
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} // namespace cutlass
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