CUTLASS 2.0 (#62)
CUTLASS 2.0 Substantially refactored for - Better performance, particularly for native Turing Tensor Cores - Robust and durable templates spanning the design space - Encapsulated functionality embodying modern C++11 programming techniques - Optimized containers and data types for efficient, generic, portable device code Updates to: - Quick start guide - Documentation - Utilities - CUTLASS Profiler Native Turing Tensor Cores - Efficient GEMM kernels targeting Turing Tensor Cores - Mixed-precision floating point, 8-bit integer, 4-bit integer, and binarized operands Coverage of existing CUTLASS functionality: - GEMM kernels targeting CUDA and Tensor Cores in NVIDIA GPUs - Volta Tensor Cores through native mma.sync and through WMMA API - Optimizations such as parallel reductions, threadblock rasterization, and intra-threadblock reductions - Batched GEMM operations - Complex-valued GEMMs Note: this commit and all that follow require a host compiler supporting C++11 or greater.
This commit is contained in:
Andrew Kerr
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# Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without modification, are permitted
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# provided that the following conditions are met:
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# * Redistributions of source code must retain the above copyright notice, this list of
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# conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright notice, this list of
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# conditions and the following disclaimer in the documentation and/or other materials
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# provided with the distribution.
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# * Neither the name of the NVIDIA CORPORATION nor the names of its contributors may be used
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# to endorse or promote products derived from this software without specific prior written
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# permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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# FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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# STRICT LIABILITY, OR TOR (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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cutlass_example_add_executable(
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07_volta_tensorop_gemm
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volta_tensorop_gemm.cu
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)
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/***************************************************************************************************
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* * Neither the name of the NVIDIA CORPORATION nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TOR (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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/**
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This example shows how to run matrix multiplication kernels using functions and data structures
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provided by CUTLASS using tensor cores; which we run on a NVIDIA Volta GPU.
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Writing a single high performance matrix multiplication kernel is hard but do-able. Whereas writing
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high performance kernels at scale which works for multiple problem sizes with good abstractions is
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really hard. CUTLASS solves this problem by providing simplified abstractions (knobs) to compose
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multiple sections of gemm kernel. When used properly, the kernels can hit peak performance of GPU
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easily.
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CUTLASS divides a kernel into hierarchical composable sections. Which means, at each thread, warp
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and thread-block level, they compute on their own tile-size with higher level of tile sizes being
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composed from lower level ones. Multiple thread-tiles (tile size each thread computes) can be used
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to form warp-tiles (tile size each warp computes) and multiple warp tiles can be used to compute
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threadblock-tile (tile size computed by a threadblock).
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In thie example, we split variable initialization into
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1. Setting up data properties : describes how matrices are laid out in the memory and how the kernel
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can view them (logical to physical mapping)
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2. Setting up computation properties : describes how the above set matrices will be used to compute
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output of matrix multiplication.
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First, we setup the data types of matrices A, B, C and D along with alpha, beta as the equation for
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GEMM is D = alpha * A * B + beta * C. In CUTLASS, the kernels first compute A * B and leaves the
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rest of the computation to end of the kernel as alpha * X + beta * C is a simple element-wise
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operation on X (A * B) and C. We call this as epilogue of kernel. Hence, we setup data types for
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alpha and beta to be equal to ElementComputeEpilogue = float. As we want to MMA instructions on
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Volta and they support only half-precision floating point (fp16 or half), we use data type for
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elements in input matrix A and B as cutlass::half_t. Volta also supports accumulation of partial dot
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product to fp32, which can store wider range of numbers, we use it as data type of output matrix
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elements and accumulation. We convey this to CUTLASS kernel by initializing template variables
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ElementAccumulator (float), ElementComputeEpilogue (float), ElementInputA (cutlass::half_t),
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ElementInputB (cutlass::half_t), ElementOutput (float). Communicating just the data type is not
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enough. As the data is laid out linearly in memory, we have to convey the layout of matrices. We do
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that by initializing template variable LayoutInputA to column major cutlass variable, LayoutInputB
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to row major and LayoutOutput to row major. Next, we setup rules to comptue alpha * X + beta * C
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which is called epilogue of the kernel. We initialize template variable EpilogueOp, which takes the
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data type of output ElementOutput (int32_t), the number of elements per vector memory access (16),
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data type of accumulator (int32_t) and data type of computation of linear combination (alpha * X +
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beta * C).
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Now that we setup the properties of data, we have to setup properties of computation.
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Second, we create template variables of tile sizes for thread-block, warp and mma-op to 128x128x32,
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64x64x4, 8x8x4 (MxNxK) respectively. When passed to instantiate CUTLASS GEMM kernel, it internally
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deduce the amount of threads needed per thread-block, amount of shared memory, storing data in
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bank-conflict free manner, and ton of other variables required to compose, intialize and launch a
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high performance GEMM kernel. This is the beauty of CUTLASS, it relieves developer from
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understanding and coding complicated hardware optimizations which can easily go wrong.
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CUTLASS also supports multiple MMA pipelines in a CTA. What are MMA pipelines? MMA pipelines
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constitute the whole process of loading input data from global memory to shared memory, loading data
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from shared memory to registers, doing matrix multiplication, store to global memory. The below flow
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sequence shows a typical mma pipeline.
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matrix in global memory -> registers -> tile in shared memory -> registers -> mma -> registers ->
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output to global memory
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The problem with single pipeline is, each stage is synchronous which means, each stage has to wait
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until the previous finished executing. There are stages in the pipeline which do not have fixed
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latency, for example, the loads from global memory and shared memory. Therefore, we can add one more
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pipeline with a phase shift in mma kernel to hide latency from global and shared memory loads.
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Finally, the pipeline in a kernel looks like
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(1) matrix in global memory -> (2) registers -> (3) tile in shared memory -> (4) registers -> (5)
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mma -> (6) registers -> (7) output to global memory (1) <null> -> (2) <null> -> (3) matrix in global
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memory -> (4) registers -> (5) tile in shared memory -> (6) registers -> (7) mma -> (8) registers ->
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(9) output to global memory
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This way, you can hide the second global memoroy load latency by doing computation on already loaded
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input data.
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There are few more template variables initialized such as, which threadblock tile of output matrix
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is done which threadblock launched on an SM, CUDA SM architecture of GPU you want to run on.
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These are all put together to create a template variable which describes CUTLASS GEMM kernel using
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cutlass::gemm::device::Gemm template.
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The next step is to intialize physical data, instantiate and initialize CUTLASS kernel and run it.
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We use CUTLASS utilities to initialize, fill, compare matrices as they are simple and doesn't come
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in the way of learning CUTLASS.
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Once all the matrices are initialized and filled with data, create arguments tuple to launch CUTLASS
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kernel which takes problem size (M = 5120, N = 4096 and K = 4096), matrices, alpha, beta and the
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important one, split k-dimension factor. Along with that, we query CUTLASS if any scratch-space
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memory required by the kernel we instantiated. If yes, we create it and pass it along with other
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arguments created to intialize CUTLASS kernel then, the kernel is launched.
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In this example, we later on launch a reference gemm kernel (from CUTLASS utilities) to compare if
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the output from CUTLASS kernel is same as reference GEMM kernel.
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*/
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#include <iostream>
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#include "cutlass/cutlass.h"
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#include "cutlass/gemm/device/gemm.h"
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#include "cutlass/util/host_tensor.h"
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#include "cutlass/util/reference/device/gemm.h"
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#include "cutlass/util/reference/host/tensor_compare.h"
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#include "cutlass/util/reference/host/tensor_copy.h"
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#include "cutlass/util/reference/host/tensor_fill.h"
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#include "cutlass/util/tensor_view_io.h"
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#include "helper.h"
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// The code section below describes datatype for input, output matrices and computation between
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// elements in input matrices.
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using ElementAccumulator = float; // <- data type of accumulator
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using ElementComputeEpilogue = ElementAccumulator; // <- data type of epilogue operations
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using ElementInputA = cutlass::half_t; // <- data type of elements in input matrix A
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using ElementInputB = cutlass::half_t; // <- data type of elements in input matrix B
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using ElementOutput = float; // <- data type of elements in output matrix D
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// The code section below describes matrix layout of input and output matrices. Column Major for
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// Matrix A, Row Major for Matrix B and Row Major for Matrix C
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using LayoutInputA = cutlass::layout::ColumnMajor;
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using LayoutInputB = cutlass::layout::RowMajor;
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using LayoutOutput = cutlass::layout::RowMajor;
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// This code section describes whether you want to use tensor cores or regular SIMT cores on GPU SM
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using MMAOp = cutlass::arch::OpClassTensorOp;
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// This code section describes CUDA SM architecture number
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using SmArch = cutlass::arch::Sm70;
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// This code section describes the tile size a thread block will compute
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using ShapeMMAThreadBlock =
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cutlass::gemm::GemmShape<128, 128, 32>; // <- threadblock tile M = 128, N = 128, K = 32
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// This code section describes tile size a warp will compute
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using ShapeMMAWarp = cutlass::gemm::GemmShape<64, 64, 32>; // <- warp tile M = 64, N = 64, K = 32
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// This code section describes the size of MMA op
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using ShapeMMAOp = cutlass::gemm::GemmShape<8, 8, 4>; // <- MMA Op tile M = 8, N = 8, K = 4
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// This code section describes how threadblocks are scheduled on GPU
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using SwizzleThreadBlock = cutlass::gemm::threadblock::GemmIdentityThreadblockSwizzle; // <- ??
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// This code section describes ?
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using EpilogueOp = cutlass::epilogue::thread::LinearCombination<
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ElementOutput, // <- data type of output matrix
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128 / cutlass::sizeof_bits<ElementOutput>::value, // <- this is the number of elements per
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// vectorized memory access. For half
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// precision, it's 8 elements. This becomes
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// the vector width of math instructions in
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// epilogue too
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ElementAccumulator, // <- data type of accumulator
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ElementComputeEpilogue>; // <- data type for alpha/beta in linear combination function
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// Number of pipelines you want to use
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constexpr int NumStages = 2;
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using Gemm = cutlass::gemm::device::Gemm<ElementInputA,
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LayoutInputA,
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ElementInputB,
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LayoutInputB,
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ElementOutput,
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LayoutOutput,
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ElementAccumulator,
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MMAOp,
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SmArch,
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ShapeMMAThreadBlock,
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ShapeMMAWarp,
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ShapeMMAOp,
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EpilogueOp,
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SwizzleThreadBlock,
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NumStages>;
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int main() {
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cudaDeviceProp props;
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CUDA_CHECK(cudaGetDeviceProperties(&props, 0));
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if (!(props.major >= 7)) {
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std::cerr << "Volta Tensor Ops must be run on a machine with compute capability at least 70."
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<< std::endl;
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return 0;
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}
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const int length_m = 5120;
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const int length_n = 4096;
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const int length_k = 4096;
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// Create a tuple of problem size for matrix multiplication
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cutlass::gemm::GemmCoord problem_size(length_m, length_n, length_k);
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// Initialize tensors using CUTLASS helper functions
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cutlass::HostTensor<ElementInputA, LayoutInputA> tensor_a(
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problem_size.mk()); // <- Create matrix A with dimensions M x K
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cutlass::HostTensor<ElementInputB, LayoutInputB> tensor_b(
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problem_size.nk()); // <- Create matrix B with dimensions N x K
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cutlass::HostTensor<ElementOutput, LayoutOutput> tensor_c(
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problem_size.mn()); // <- Create matrix C with dimensions M x N
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cutlass::HostTensor<ElementOutput, LayoutOutput> tensor_d(
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problem_size.mn()); // <- Create matrix D with dimensions M x N used to store output from
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// CUTLASS kernel
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cutlass::HostTensor<ElementOutput, LayoutOutput> tensor_ref_d(
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problem_size.mn()); // <- Create matrix D with dimensions M x N used to store output from
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// reference kernel
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// Fill input and output matrices on host using CUTLASS helper functions
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cutlass::reference::host::TensorFillRandomUniform(
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tensor_a.host_view(),
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1,
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ElementInputA(4),
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ElementInputA(-4),
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0); // <- Fill matrix A on host with uniform-distribution random data
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cutlass::reference::host::TensorFillRandomUniform(
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tensor_b.host_view(),
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1,
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ElementInputB(4),
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ElementInputB(-4),
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0); // <- Fill matrix B on host with uniform-distribution random data
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cutlass::reference::host::TensorFillRandomUniform(
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tensor_c.host_view(),
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1,
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ElementOutput(4),
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ElementOutput(-4),
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0); // <- Fill matrix C on host with uniform-distribution random data
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cutlass::reference::host::TensorFill(
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tensor_d.host_view()); // <- fill matrix D on host with zeros
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cutlass::reference::host::TensorFill(
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tensor_ref_d.host_view()); // <- fill matrix D for reference on host with zeros
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// Copy data from host to GPU
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tensor_a.sync_device();
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tensor_b.sync_device();
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tensor_c.sync_device();
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tensor_d.sync_device();
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tensor_ref_d.sync_device();
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// Initialize alpha and beta for dot product computation
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ElementComputeEpilogue alpha = ElementComputeEpilogue(1);
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ElementComputeEpilogue beta = ElementComputeEpilogue(0);
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// Split K dimension into 1 partitions
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int split_k_slices = 1;
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// Create a tuple of gemm kernel arguments. This is later passed as arguments to launch
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// instantiated CUTLASS kernel
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typename Gemm::Arguments arguments{problem_size, // <- problem size of matrix multiplication
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tensor_a.device_ref(), // <- reference to matrix A on device
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tensor_b.device_ref(), // <- reference to matrix B on device
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tensor_c.device_ref(), // <- reference to matrix C on device
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tensor_d.device_ref(), // <- reference to matrix D on device
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{alpha, beta}, // <- tuple of alpha and beta
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split_k_slices}; // <- k-dimension split factor
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// Using the arguments, query for extra workspace required for matrix multiplication computation
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size_t workspace_size = Gemm::get_workspace_size(arguments);
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// Allocate workspace memory
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cutlass::device_memory::allocation<uint8_t> workspace(workspace_size);
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// Instantiate CUTLASS kernel depending on templates
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Gemm gemm_op;
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// Initialize CUTLASS kernel with arguments and workspace pointer
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cutlass::Status status = gemm_op.initialize(arguments, workspace.get());
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CUTLASS_CHECK(status);
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// Launch initialized CUTLASS kernel
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status = gemm_op();
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CUTLASS_CHECK(status);
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// Create instantiation for device reference gemm kernel
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cutlass::reference::device::Gemm<ElementInputA,
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LayoutInputA,
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ElementInputB,
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LayoutInputB,
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ElementOutput,
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LayoutOutput,
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ElementComputeEpilogue,
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ElementComputeEpilogue>
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gemm_device;
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// Launch device reference gemm kernel
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gemm_device(problem_size,
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alpha,
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tensor_a.device_ref(),
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tensor_b.device_ref(),
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beta,
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tensor_c.device_ref(),
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tensor_ref_d.device_ref());
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// Wait for kernels to finish
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cudaDeviceSynchronize();
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// Copy output data from CUTLASS and reference kernel to host for comparison
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tensor_d.sync_host();
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tensor_ref_d.sync_host();
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// Check if output from CUTLASS kernel and reference kernel are equal or not
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std::cout << (cutlass::reference::host::TensorEquals(tensor_d.host_view(),
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tensor_ref_d.host_view())
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? "Passed"
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: "Failed")
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<< std::endl;
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CUTLASS_CHECK(status);
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return 0;
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}
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