Updates and Bug fixes to CUTLASS 3.3 (#1232)
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@@ -42,8 +42,8 @@
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#if defined(__CUDACC_RTC__)
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#include <cuda/std/type_traits>
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#else
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#include <cstdio>
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#include <type_traits>
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#include <cstdio>
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#endif
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#if ((__CUDACC_VER_MAJOR__ >= 12) || ((__CUDACC_VER_MAJOR__ == 11) && (__CUDACC_VER_MINOR__ >= 8)))
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@@ -154,7 +154,7 @@ sm90_get_smem_store_op_for_accumulator() {
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}
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else {
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// auto-vectorizing store
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return DefaultCopy{};
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return AutoVectorizingCopyWithAssumedAlignment{};
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}
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}
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@@ -175,7 +175,7 @@ sm90_get_smem_load_op_for_source() {
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}
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else {
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// auto-vectorizing load
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return DefaultCopy{};
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return AutoVectorizingCopyWithAssumedAlignment{};
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}
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}
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@@ -438,7 +438,7 @@ struct Sm90ReLUAuxStore {
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using VecType = uint_bit_t<V>;
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Tensor tC_rAux_vec = recast<VecType>(tC_rAux);
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Tensor tC_gAux_vec = recast<VecType>(tC_gAux);
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Tensor tC_cAux_vec = tC_cAux.compose(make_layout(Int<size(tC_rAux_vec)>{}, Int<V>{}));
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Tensor tC_cAux_vec = tC_cAux.compose(make_layout(Int<size(tC_rAux_vec)>{}, Int<V>{})); // only works if vector is logically sequential
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auto predicate_fn = [&] (auto&&... coords) { return elem_less(tC_cAux_vec(coords...), residue_mn); };
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copy_if(FunctionPredTensor(predicate_fn), tC_rAux_vec, tC_gAux_vec);
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}
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@@ -662,7 +662,7 @@ struct Sm90AuxLoad<
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}
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if (elem_less(repeat_like(residue_mn, _0{}), residue_mn)) { // (partially) in-bounds CTA tile
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copy(tC_gAux, tC_rAux);
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copy_aligned(tC_gAux, tC_rAux);
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}
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}
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}
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@@ -677,7 +677,7 @@ struct Sm90AuxLoad<
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}
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if (elem_less(repeat_like(residue_mn, _0{}), residue_mn)) {
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copy(tC_gAux(_,_,_,epi_m,epi_n), tC_rAux);
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copy_aligned(tC_gAux(_,_,_,epi_m,epi_n), tC_rAux);
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}
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}
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}
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@@ -641,8 +641,9 @@ struct Sm90RowBroadcast {
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if (epi_m == 0) { // Assumes M-major subtile loop
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// Filter so we don't issue redundant copies over stride-0 modes
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// (only works if 0-strides are in same location, which is by construction)
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int bcast_pipe_index = (load_iteration / EpiTiles) % Stages;
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copy(filter(tCsRow(_,_,_,epi_m,epi_n,bcast_pipe_index)), filter(tCrRow));
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copy_aligned(filter(tCsRow(_,_,_,epi_m,epi_n,bcast_pipe_index)), filter(tCrRow));
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}
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}
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@@ -774,7 +775,8 @@ struct Sm90ColBroadcast {
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}
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// Filter so we don't issue redundant copies over stride-0 modes
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copy(filter(tCgCol), filter(tCrCol));
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// (only works if 0-strides are in same location, which is by construction)
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copy_aligned(filter(tCgCol), filter(tCrCol));
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}
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template <typename ElementAccumulator, int FragmentSize>
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@@ -915,8 +915,9 @@ public:
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using ElementGmem = conditional_t<FinalReduction, ElementCompute volatile, ElementCompute>;
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Tensor tCgBuf = sm90_partition_for_epilogue<ReferenceSrc>(gBuf_nl(_,_,n,l), epi_tile, tiled_copy, thread_idx);
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if (is_reduced_lane) {
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// Filter so we don't issue redunant copies over stride-0 modes
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copy(filter(tCrCol), recast<ElementGmem>(filter(tCgBuf)));
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// Filter so we don't issue redundant copies over stride-0 modes
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// (only works if 0-strides are in same location, which is by construction)
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copy_aligned(filter(tCrCol), recast<ElementGmem>(filter(tCgBuf)));
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}
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sync_fn();
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}
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@@ -934,7 +935,8 @@ public:
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Tensor tCsBuf = sm90_partition_for_epilogue<ReferenceSrc>(sBuf(_,_,get<1>(warp_mn)), epi_tile, tiled_copy, thread_idx);
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if (is_reduced_lane) {
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// Filter so we don't issue redunant copies over stride-0 modes
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copy(filter(tCrCol), filter(tCsBuf));
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// (only works if 0-strides are in same location, which is by construction)
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copy_aligned(filter(tCrCol), filter(tCsBuf));
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}
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sync_fn();
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@@ -231,7 +231,7 @@ int ceil_div(int a, int b) {
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* log2_up/down codes?
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*/
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template <typename value_t>
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CUTLASS_HOST_DEVICE int clz(value_t x) {
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CUTLASS_HOST_DEVICE value_t clz(value_t x) {
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for (int i = 31; i >= 0; --i) {
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if ((1 << i) & x)
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return value_t(31 - i);
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@@ -1,4 +1,4 @@
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/**************************************************************************************************
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/***************************************************************************************************
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* Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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@@ -217,7 +217,7 @@ struct alignas(1) float8_base {
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// Extract the bits in the FP32 type
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uint8_t sign = uint8_t((s >> 24 & 0x80));
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int32_t exp = int32_t((s >> FP32_NUM_MANTISSA_BITS) & 0xff) - FP32_EXPONENT_BIAS;
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uint32_t mantissa = s & 0x7fffff;
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int mantissa = s & 0x7fffff;
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uint8_t u = 0;
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uint8_t const kF8_NaN = 0x7f;
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@@ -375,6 +375,7 @@ public:
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}
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};
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Static initializers
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/////////////////////////////////////////////////////////////////////////////////////////////////
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@@ -347,7 +347,7 @@ public:
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// The number of tiles for which reduction is required is either:
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// (a) the total number of output tiles (in the case of split-K)
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// (b) the number of stream-K tiles
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// To calcualte the total number of output tiles in the split-K case, we
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// To calculate the total number of output tiles in the split-K case, we
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// note that, in the split-K case, the units_per_problem_ member of Params will be
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// the total number of output tiles.
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auto reduction_tiles = params.splits_ > 1 ? params.units_per_problem_ : params.sk_tiles_;
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