v4.4 tag release update. (#3032)
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@@ -53,8 +53,8 @@ Tile Assignment:
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- CTA i on rank r processes global_tile_id = r * ctas_per_rank + i
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TMA Usage Notes (for tutorial purposes, not perf-optimal):
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- Uses TMALDG.1D to load from remote GPU memory via NVSHMEM addresses
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- Uses TMASTG.1D to store to multicast address for broadcasting to all ranks
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- Uses 1D TMA load to load from remote GPU memory via NVSHMEM addresses
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- Uses 1D TMA load to store to multicast address for broadcasting to all ranks
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- Supports any input shape by flattening to 1D and tiling linearly
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- Pipeline with 2 stages overlaps TMA loads across ranks
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@@ -339,7 +339,7 @@ class AllReduceTmaKernel:
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producer_state.advance()
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# ======================================================================
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# Warp 1-4: Consumer - LDS, ADD, STS
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# Warp 1-4: Consumer - Load from smem, ADD, Store to smem
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# ======================================================================
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else:
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consumer_tid = tidx - self._tma_threads
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