CUTLASS 2.3 initial commit (#134)
CUTLASS 2.3 adds GEMMs targeting Sparse Tensor Cores on the NVIDIA Ampere Architecture, fast SGEMM, and small matrix classes, bug fixes, and performance enhancements.
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@@ -292,7 +292,7 @@ class PredicatedTileAccessIterator<Shape_, Element_, layout::PitchLinear,
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min(threadblock_offset.strided() + residue_size, extent_.strided())
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);
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} else {
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Index residue_size = (extent_[kAdvanceRank] - threadblock_offset.contiguous()) % Shape::kContiguous;
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if (!residue_size) {
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residue_size = Shape::kContiguous;
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@@ -852,7 +852,7 @@ class PredicatedTileAccessIterator<Shape_, Element_, layout::RowMajor,
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////////////////////////////////////////////////////////////////////////////////
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/// Specialization of PredicatedTileAccessIterator for interleaved-32 data. It
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/// Specialization of PredicatedTileAccessIterator for interleaved data. It
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/// is mapped to the congruous layout.
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///
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/// Satisfies: ForwardTileIteratorConcept |
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@@ -1032,7 +1032,7 @@ class PredicatedTileAccessIterator<Shape_, Element_,
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////////////////////////////////////////////////////////////////////////////////
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/// Specialization of PredicatedTileAccessIterator for interleaved-32 data. It
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/// Specialization of PredicatedTileAccessIterator for interleaved data. It
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/// is mapped to the congruous layout.
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///
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/// Satisfies: ForwardTileIteratorConcept |
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@@ -451,6 +451,10 @@ class RegularTileAccessIterator<Shape_, Element_,
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using ThreadMap = ThreadMap_;
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static_assert(!(ThreadMap::Delta::kContiguous % kCrosswise),
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"kCrosswise is the smallest unit in the contiguous dimension "
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"for shared memory swizzling.");
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/// Internal details made public to facilitate introspection
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struct Detail {
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/// This iterator is specialized for an access size that is 128 bits in
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@@ -554,8 +558,10 @@ class RegularTileAccessIterator<Shape_, Element_,
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int access_offset =
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stride_idx * ThreadMap::Delta::kStrided * stride_ / Layout::kFactor +
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iteration_contiguous_ * ThreadMap::Delta::kContiguous /
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ThreadMap::kElementsPerAccess;
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// kCrosswise elements in the contiguous dimension would span to a
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// shared memory cache line.
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iteration_contiguous_ * (ThreadMap::Delta::kContiguous / kCrosswise) *
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Layout::TileShape::kContiguous;
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char *access_byte_ptr =
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reinterpret_cast<char *>(access_ptr + access_offset);
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return reinterpret_cast<AccessType *>(access_byte_ptr + byte_offset_);
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@@ -49,7 +49,8 @@ namespace threadblock {
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/////////////////////////////////////////////////////////////////////////////////////////////////
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/// Regular tile iterator specialized for pitch-linear
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/// Regular tile iterator specialized for pitch-linear. This one is used by 2-stage SIMT kernels
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/// and sparse tensor core meta data.
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template <
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typename Shape_,
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typename Element_,
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@@ -139,7 +140,8 @@ public:
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for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
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int idx = c + s * ThreadMap::Iterations::kContiguous;
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frag_ptr[idx] = access_ptr[c * ThreadMap::Delta::kContiguous];
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frag_ptr[idx] = access_ptr[c * ThreadMap::Delta::kContiguous /
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ThreadMap::kElementsPerAccess];
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}
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if (s + 1 < ThreadMap::Iterations::kStrided) {
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@@ -180,7 +182,8 @@ public:
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for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
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int idx = c + s * ThreadMap::Iterations::kContiguous;
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access_ptr[c * ThreadMap::Delta::kContiguous] = frag_ptr[idx];
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access_ptr[c * ThreadMap::Delta::kContiguous /
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ThreadMap::kElementsPerAccess] = frag_ptr[idx];
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}
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if (s + 1 < ThreadMap::Iterations::kStrided) {
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