CUTLASS 3.2.1 (#1113)
* Updates for 3.2.1 release. * Minor fix in gemm op profiler for raster order. * Add scheduler mapping for raster order in the kernels.
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@@ -62,10 +62,10 @@ struct GemmIdentityThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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/// *Gemm* problem size: gemm(M, N, K)
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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GemmCoord problem_size,
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GemmCoord tile_size,
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int split_k_slices) const {
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int split_k_slices) {
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return GemmCoord(
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(problem_size.m() + tile_size.m() - 1) / tile_size.m(),
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@@ -76,11 +76,11 @@ struct GemmIdentityThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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/// *ImplicitGemm* Conv2d problem size: conv_operator(NPQK, NHWC, KRSC)
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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cutlass::conv::Operator conv_operator,
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cutlass::conv::Conv2dProblemSize const &problem_size,
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GemmCoord tile_size,
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int split_k_slices) const {
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int split_k_slices) {
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gemm::GemmCoord implicit_gemm_problem_size =
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cutlass::conv::implicit_gemm_problem_size(conv_operator, problem_size);
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@@ -92,11 +92,11 @@ struct GemmIdentityThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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/// *ImplicitGemm* Conv3d problem size: conv_operator(NZPQK, NDHWC, KTRSC)
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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cutlass::conv::Operator conv_operator,
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cutlass::conv::Conv3dProblemSize const &problem_size,
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GemmCoord tile_size,
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int split_k_slices) const {
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int split_k_slices) {
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gemm::GemmCoord implicit_gemm_problem_size =
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cutlass::conv::implicit_gemm_problem_size(conv_operator, problem_size);
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@@ -107,7 +107,7 @@ struct GemmIdentityThreadblockSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(GemmCoord tiled_shape) const {
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static dim3 get_grid_shape(GemmCoord tiled_shape) {
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int tile = 1 << get_log_tile(tiled_shape);
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return dim3(tiled_shape.m() * tile, (tiled_shape.n() + tile - 1) / tile, tiled_shape.k());
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}
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@@ -129,7 +129,7 @@ struct GemmIdentityThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(int log_tile) const {
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static GemmCoord get_tile_offset(int log_tile) {
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int block_idx_x = RematerializeBlockIdxX();
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int block_idx_y = RematerializeBlockIdxY();
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int block_idx_z = RematerializeBlockIdxZ();
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@@ -141,7 +141,7 @@ struct GemmIdentityThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(GemmCoord tiled_shape) const {
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static GemmCoord get_tile_offset(GemmCoord tiled_shape) {
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int const kTile = N;
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int block_idx_x = RematerializeBlockIdxX();
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@@ -168,10 +168,10 @@ struct GemmHorizontalThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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GemmCoord problem_size,
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GemmCoord tile_size,
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int split_k_slices) const {
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int split_k_slices) {
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return GemmCoord(
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(problem_size.m() + tile_size.m() - 1) / tile_size.m(),
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@@ -181,7 +181,7 @@ struct GemmHorizontalThreadblockSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(GemmCoord tiled_shape) const {
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static dim3 get_grid_shape(GemmCoord tiled_shape) {
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return dim3(tiled_shape.n(), tiled_shape.m(), tiled_shape.k());
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}
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@@ -193,7 +193,7 @@ struct GemmHorizontalThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(GemmCoord tiled_shape) const {
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static GemmCoord get_tile_offset(GemmCoord tiled_shape) {
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return GemmCoord{
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RematerializeBlockIdxY(),
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RematerializeBlockIdxX(),
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@@ -209,10 +209,10 @@ struct GemmBatchedIdentityThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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GemmCoord problem_size,
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GemmCoord tile_size,
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int batch_count) const {
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int batch_count) {
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return GemmCoord(
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(problem_size.m() + tile_size.m() - 1) / tile_size.m(),
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@@ -222,7 +222,7 @@ struct GemmBatchedIdentityThreadblockSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(GemmCoord tiled_shape) const {
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static dim3 get_grid_shape(GemmCoord tiled_shape) {
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return dim3(tiled_shape.m(), tiled_shape.n(), tiled_shape.k());
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}
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@@ -234,7 +234,7 @@ struct GemmBatchedIdentityThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(GemmCoord tiled_shape) const {
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static GemmCoord get_tile_offset(GemmCoord tiled_shape) {
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return GemmCoord{
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RematerializeBlockIdxX(),
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RematerializeBlockIdxY(),
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@@ -244,7 +244,7 @@ struct GemmBatchedIdentityThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(int log_tile) const {
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static GemmCoord get_tile_offset(int log_tile) {
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int block_idx_x = RematerializeBlockIdxX();
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int block_idx_y = RematerializeBlockIdxY();
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int block_idx_z = RematerializeBlockIdxZ();
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@@ -256,7 +256,7 @@ struct GemmBatchedIdentityThreadblockSwizzle {
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/// Gets the batch index
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CUTLASS_DEVICE
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int get_batch_idx() const {
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static int get_batch_idx() {
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return RematerializeBlockIdxZ();
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}
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};
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@@ -271,10 +271,10 @@ struct GemmSplitKIdentityThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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GemmCoord problem_size,
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GemmCoord tile_size,
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int partitions) const {
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int partitions) {
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return GemmCoord(
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(problem_size.m() + tile_size.m() - 1) / tile_size.m(),
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@@ -299,14 +299,14 @@ struct GemmSplitKIdentityThreadblockSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(GemmCoord tiled_shape) const {
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static dim3 get_grid_shape(GemmCoord tiled_shape) {
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int tile = 1 << get_log_tile(tiled_shape);
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return dim3(tiled_shape.m() * tile, (tiled_shape.n() + tile - 1) / tile, tiled_shape.k());
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}
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(int log_tile) const {
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static GemmCoord get_tile_offset(int log_tile) {
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int block_idx_x = RematerializeBlockIdxX();
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int block_idx_y = RematerializeBlockIdxY();
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int block_idx_z = RematerializeBlockIdxZ();
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@@ -318,7 +318,7 @@ struct GemmSplitKIdentityThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(GemmCoord tiled_shape) const {
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static GemmCoord get_tile_offset(GemmCoord tiled_shape) {
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int const kTile = N;
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int block_idx_x = RematerializeBlockIdxX();
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@@ -342,10 +342,10 @@ struct GemmSplitKHorizontalThreadblockSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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CUTLASS_HOST_DEVICE
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GemmCoord get_tiled_shape(
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static GemmCoord get_tiled_shape(
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GemmCoord problem_size,
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GemmCoord tile_size,
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int partitions) const {
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int partitions) {
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return GemmCoord(
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(problem_size.m() + tile_size.m() - 1) / tile_size.m(),
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@@ -355,7 +355,7 @@ struct GemmSplitKHorizontalThreadblockSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(GemmCoord tiled_shape) const {
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static dim3 get_grid_shape(GemmCoord tiled_shape) {
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return dim3(tiled_shape.n(), tiled_shape.m(), tiled_shape.k());
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}
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@@ -367,7 +367,7 @@ struct GemmSplitKHorizontalThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(int log_tile) const {
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static GemmCoord get_tile_offset(int log_tile) {
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return GemmCoord{
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RematerializeBlockIdxY(),
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RematerializeBlockIdxX(),
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@@ -377,7 +377,7 @@ struct GemmSplitKHorizontalThreadblockSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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GemmCoord get_tile_offset(GemmCoord tiled_shape) const {
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static GemmCoord get_tile_offset(GemmCoord tiled_shape) {
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return GemmCoord{
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RematerializeBlockIdxY(),
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RematerializeBlockIdxX(),
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@@ -393,9 +393,9 @@ struct GemvBatchedStridedThreadblockDefaultSwizzle {
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/// Returns the shape of the problem in units of logical tiles
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CUTLASS_HOST_DEVICE
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BatchedGemmCoord get_tiled_shape(
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static BatchedGemmCoord get_tiled_shape(
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BatchedGemmCoord problem_size,
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BatchedGemmCoord tile_size) const {
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BatchedGemmCoord tile_size) {
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return BatchedGemmCoord(
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1, // M is always 1
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@@ -406,7 +406,7 @@ struct GemvBatchedStridedThreadblockDefaultSwizzle {
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/// Computes CUDA grid dimensions given a size in units of logical tiles
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CUTLASS_HOST_DEVICE
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dim3 get_grid_shape(BatchedGemmCoord tiled_shape) const {
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static dim3 get_grid_shape(BatchedGemmCoord tiled_shape) {
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return dim3(tiled_shape.n(), tiled_shape.batch(), tiled_shape.k());
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}
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@@ -418,7 +418,7 @@ struct GemvBatchedStridedThreadblockDefaultSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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BatchedGemmCoord get_tile_offset(int log_tile) const {
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static BatchedGemmCoord get_tile_offset(int log_tile) {
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return BatchedGemmCoord{
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0, // M is always 1
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RematerializeBlockIdxX(),
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@@ -429,7 +429,7 @@ struct GemvBatchedStridedThreadblockDefaultSwizzle {
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/// Obtains the threadblock offset (in units of threadblock-scoped tiles)
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CUTLASS_DEVICE
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BatchedGemmCoord get_tile_offset() const {
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static BatchedGemmCoord get_tile_offset() {
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return BatchedGemmCoord{
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0, // M is always 1
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RematerializeBlockIdxX(),
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@@ -440,13 +440,13 @@ struct GemvBatchedStridedThreadblockDefaultSwizzle {
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/// Gets the batch tile index
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CUTLASS_DEVICE
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int get_batch_tile_idx() const {
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static int get_batch_tile_idx() {
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return RematerializeBlockIdxY();
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}
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/// Gets the absolute batch index
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CUTLASS_DEVICE
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int get_batch_idx() const {
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static int get_batch_idx() {
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return RematerializeBlockDimY()*RematerializeBlockIdxY() + RematerializeThreadIdxY();
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}
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};
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