v4.2 tag release. (#2638)
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@@ -1215,6 +1215,7 @@ struct Sm100FmhaBwdKernelTmaWarpSpecialized {
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Tensor tTR_cST_p = thread_t2r.partition_D(cST);
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Tensor tTR_cST = split_wg(tTR_cST_p);
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Tensor tTR_rST = make_tensor<ElementAcc>(shape(tTR_cST));
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// Tensor tTR_tST_p = thread_t2r.partition_S(tSTtST);
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Tensor tTR_tST = split_wg(thread_t2r.partition_S(tSTtST));
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Tensor tTR_cDPT_p = thread_t2r.partition_D(cDPT);
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@@ -1507,6 +1508,9 @@ struct Sm100FmhaBwdKernelTmaWarpSpecialized {
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CUTLASS_DEVICE void operator()(Params const& params, char* smem) {
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#if (! defined(CUTLASS_ARCH_MMA_SM100A_ENABLED) && ! defined(CUTLASS_ARCH_MMA_SM100F_ENABLED))
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printf("ERROR : Arch conditional MMA instruction used without targeting appropriate compute capability. Aborting.\n");
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#else
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int warp_idx = cutlass::canonical_warp_idx_sync();
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auto role = warp_idx_to_role(warp_idx);
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uint32_t lane_predicate = cute::elect_one_sync();
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@@ -1835,6 +1839,7 @@ struct Sm100FmhaBwdKernelTmaWarpSpecialized {
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/* no-op */
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}
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#endif
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}
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static dim3 get_block_shape() {
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@@ -1480,6 +1480,9 @@ struct Sm100FmhaBwdMlaKernelTmaWarpSpecialized {
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CUTLASS_DEVICE void operator()(Params const& params, char* smem) {
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#if (! defined(CUTLASS_ARCH_MMA_SM100A_ENABLED) && ! defined(CUTLASS_ARCH_MMA_SM100F_ENABLED))
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printf("ERROR : Arch conditional MMA instruction used without targeting appropriate compute capability. Aborting.\n");
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#else
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int warp_idx = cutlass::canonical_warp_idx_sync();
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auto role = warp_idx_to_role(warp_idx);
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uint32_t lane_predicate = cute::elect_one_sync();
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@@ -1804,6 +1807,7 @@ struct Sm100FmhaBwdMlaKernelTmaWarpSpecialized {
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/* no-op */
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}
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#endif
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}
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static dim3 get_block_shape() {
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@@ -251,6 +251,9 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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}
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CUTLASS_DEVICE void operator()(const Params ¶ms, char* smem) {
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#if (! defined(CUTLASS_ARCH_MMA_SM100A_ENABLED) && ! defined(CUTLASS_ARCH_MMA_SM100F_ENABLED))
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printf("ERROR : Arch conditional MMA instruction used without targeting appropriate compute capability. Aborting.\n");
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#else
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TileScheduler tile_scheduler{params.tile_scheduler};
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@@ -465,6 +468,8 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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else if (role == WarpRole::Correction) {
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cutlass::arch::warpgroup_reg_dealloc<NumRegsCorrection>();
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bool has_valid = false;
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CUTLASS_PRAGMA_NO_UNROLL
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for (; tile_scheduler.is_valid(); ++tile_scheduler) {
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auto blk_coord = tile_scheduler.get_block_coord();
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@@ -476,6 +481,8 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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continue;
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}
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has_valid = true;
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if (get<1>(logical_problem_shape) == 0) {
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mainloop.correction_empty(
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blk_coord,
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@@ -505,16 +512,17 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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if constexpr (NumWarpsEpilogue == 0) {
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static_assert(NumWarpsCorrection == 1);
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uint32_t free_stage_ptr = shared_storage.tmem_base_ptr;
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tmem_allocator.free(free_stage_ptr, TmemAllocator::Sm100TmemCapacityColumns);
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if (has_valid) {
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uint32_t free_stage_ptr = shared_storage.tmem_base_ptr;
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tmem_allocator.free(free_stage_ptr, TmemAllocator::Sm100TmemCapacityColumns);
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}
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}
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}
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else if (role == WarpRole::MMA) {
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warpgroup_reg_set<NumRegsOther>();
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tmem_allocator.allocate(TmemAllocator::Sm100TmemCapacityColumns, &shared_storage.tmem_base_ptr);
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__syncwarp();
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bool allocated = false;
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CUTLASS_PRAGMA_NO_UNROLL
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for (; tile_scheduler.is_valid(); ++tile_scheduler) {
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@@ -527,6 +535,12 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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continue;
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}
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if (!allocated) {
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tmem_allocator.allocate(TmemAllocator::Sm100TmemCapacityColumns, &shared_storage.tmem_base_ptr);
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__syncwarp();
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allocated = true;
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}
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if (get<1>(logical_problem_shape) == 0) {
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continue;
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}
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@@ -580,6 +594,8 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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else if (role == WarpRole::Epilogue) {
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warpgroup_reg_set<NumRegsOther>();
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bool has_valid = false;
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CUTLASS_PRAGMA_NO_UNROLL
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for (; tile_scheduler.is_valid(); ++tile_scheduler) {
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auto blk_coord = tile_scheduler.get_block_coord();
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@@ -591,6 +607,8 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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continue;
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}
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has_valid = true;
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epilogue.store(
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blk_coord, logical_problem_shape,
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params.epilogue, params.problem_shape,
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@@ -602,8 +620,10 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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static_assert(NumWarpsEpilogue <= 1);
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if constexpr (NumWarpsEpilogue == 1) {
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uint32_t free_stage_ptr = shared_storage.tmem_base_ptr;
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tmem_allocator.free(free_stage_ptr, TmemAllocator::Sm100TmemCapacityColumns);
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if(has_valid) {
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uint32_t free_stage_ptr = shared_storage.tmem_base_ptr;
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tmem_allocator.free(free_stage_ptr, TmemAllocator::Sm100TmemCapacityColumns);
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}
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}
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}
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@@ -612,6 +632,7 @@ struct Sm100FmhaFwdKernelTmaWarpspecialized {
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/* no-op, donate regs and exit */
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}
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#endif
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}
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};
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@@ -247,6 +247,9 @@ struct Sm100FmhaGenKernelWarpspecialized {
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}
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CUTLASS_DEVICE void operator()(const Params ¶ms, char* smem) {
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#if (! defined(CUTLASS_ARCH_MMA_SM100A_ENABLED) && ! defined(CUTLASS_ARCH_MMA_SM100F_ENABLED))
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printf("ERROR : Arch conditional MMA instruction used without targeting appropriate compute capability. Aborting.\n");
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#else
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TileScheduler tile_scheduler{params.tile_scheduler};
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@@ -569,6 +572,7 @@ struct Sm100FmhaGenKernelWarpspecialized {
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/* no-op, donate regs and exit */
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}
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#endif
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}
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};
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@@ -507,6 +507,9 @@ struct Sm100FmhaMlaKernelTmaWarpspecialized {
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CUTLASS_DEVICE void operator()(Params const& params, char* smem_raw) {
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#if (! defined(CUTLASS_ARCH_MMA_SM100A_ENABLED) && ! defined(CUTLASS_ARCH_MMA_SM100F_ENABLED))
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printf("ERROR : Arch conditional MMA instruction used without targeting appropriate compute capability. Aborting.\n");
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#else
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TileScheduler tile_scheduler(params.tile_scheduler);
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@@ -814,6 +817,7 @@ struct Sm100FmhaMlaKernelTmaWarpspecialized {
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uint32_t free_stage_ptr = shared_storage.tmem_base_ptr;
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tmem_allocator.free(free_stage_ptr, TmemAllocator::Sm100TmemCapacityColumns);
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}
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#endif
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}
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template<class BlkCoord>
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