3 people 2286e85e77 pass a_scale from fp8 quant result instead of hard code to 1.0f (#10241) ...

Co-authored-by: Yichen Wang <yichen.wang@bytedance.com>
Co-authored-by: Jinwu Guo <641876696@qq.com>

2025-09-10 12:56:05 -07:00

..

cutlass_moe/w4a8

pass a_scale from fp8 quant result instead of hard code to 1.0f (#10241)

2025-09-10 12:56:05 -07:00

marlin_moe_wna16

Support compile sgl-kernel on cuda 13.0 (#9721)

2025-08-28 10:18:03 -07:00

cutlass_moe_helper.cu

[Fix]Fix index oob in get_group_gemm_starts kernel. (#8564)

2025-07-30 19:49:35 -07:00

fp8_blockwise_moe_kernel.cu

Make sm100 fp8 kernels available on sm103 (#9789)

2025-08-28 23:47:29 -07:00

moe_align_kernel.cu

[AMD] Reorganize hip-related header files in sgl-kernel (#9320)

2025-08-18 16:53:44 -07:00

moe_fused_gate.cu

[1/2][resubmit again] sgl-kernel: Fuse routed scaling factor into moe_fused_gate (#9088)

2025-08-12 20:12:38 -07:00

moe_topk_softmax_kernels.cu

Support compile sgl-kernel on cuda 13.0 (#9721)

2025-08-28 10:18:03 -07:00

nvfp4_blockwise_moe.cu

[1/2] Add Kernel support for Cutlass based Fused FP4 MoE (#6093)

2025-06-02 13:48:03 -07:00

prepare_moe_input.cu

fix: fix apply_shuffle_mul_sum (#7444)

2025-07-04 23:23:30 -07:00