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Author SHA1 Message Date
blzheng d1d4074c4e [CPU] Add gelu_and_mul kernel in sgl-kernel and add ut (#9300) 2025-09-08 23:23:13 -07:00
YanbingJiang 0e05fe8cf4 Update seed in CPU UTs to avoid flaky failure with single test (#7544) 2025-06-25 21:25:50 -07:00
Chunyuan WU 9179ea1595 add seed in CPU UTs to avoid flaky failure (#7333) 2025-06-18 19:12:14 -07:00
YanbingJiangWu, Chunyuan <chunyuan.wu@intel.com>jianan-gusdp
 		094c116f7d Update python API of activation, topk, norm and rope and remove vllm dependency (#6614) 
Co-authored-by: Wu, Chunyuan <chunyuan.wu@intel.com>
Co-authored-by: jianan-gu <jianan.gu@intel.com>
Co-authored-by: sdp <sdp@gnr799219.jf.intel.com>
 2025-06-17 22:11:50 -07:00
YanbingJiang d8189660a9 Update sgl-kernel UTs for activation/topk/norm/rope kernels (#6452) 2025-05-23 02:03:15 -07:00