ThomasX
3a5928ef53
feat: add page-aligned index validation for CP HiCache direct transfers
...
Add validate_page_aligned_token_indices utility and apply it across
HiCache write/load paths, NSA indexer transfers, and CUDA direct copy
kernels to reject malformed (partial, misaligned, non-contiguous) page
groups before they reach native transfer code. Also validate supported
CP HiCache backend/layout combinations at server startup.
2026-05-10 02:02:54 +08:00
ThomasX
8844c303e2
fix: synchronize CP HiCache host eviction semantics
2026-05-08 03:20:47 +08:00
ThomasX
9617d52639
fix: keep HiCache storage config runtime import
2026-05-08 03:03:10 +08:00
ThomasX
f10a8983c3
fix: keep CP HiCache load host indices on CPU
2026-05-08 02:26:46 +08:00
ThomasX
94df7a6909
feat: map CP HiCache loads to owned physical slots
2026-05-08 02:16:04 +08:00
ThomasX
a8816f18dd
test: clean CP HiCache controller imports
2026-05-08 01:23:12 +08:00
ThomasX
301420f976
feat: map CP HiCache writes to owned physical slots
2026-05-08 01:14:58 +08:00
ThomasX
36ee803aa7
test: fix Task 1 CPU unit coverage
2026-05-08 00:29:33 +08:00
ThomasX
95bacb8862
fix: preserve HiCache load-back allocator headroom
2026-05-08 00:18:33 +08:00
wxiwnd
91facd5bb2
perf(disaggregation): fast-path common decode result processing
2026-04-19 04:23:48 +08:00
Lianmin Zheng
814202704b
ci: unify PR test suite naming ( #21187 )
2026-03-23 00:18:45 -07:00
bb737d7a82
Support Qwen3 MoE context parallel ( #18233 )
...
Co-authored-by: Shunkang <182541032+Shunkangz@users.noreply.github.co >
Co-authored-by: Jiying Dong <87510204+dongjiyingdjy@users.noreply.github.com >
2026-03-22 01:27:20 -07:00
pansicheng
97b2a89334
[RadixTree][8/N Refactor]: unify lock interface ( #20330 )
2026-03-16 11:49:51 +08:00
Ke Bao
c3483e8e97
[CI] Move existing unit tests into unit directory ( #20631 )
2026-03-15 23:25:18 +08:00
ThomasX
wxiwnd