Commit Graph
94 Commits
Author SHA1 Message Date
XDaoHongandZhengdQin 4733fcff1f [Feature] npu support enable_torch_compile for torchair backend (#13410)
Co-authored-by: ZhengdQin <zhengdqin@gmail.com>
2025-12-16 09:23:51 +08:00
DarkSharpness f03bfa4ce3 [Feature] Fuse mrope all in 1 kernel (#14906) 2025-12-15 02:50:55 -08:00
liupeng374 d36299ad77 [NPU] perf update with kvcache nz & w4a8 quant (#14423) 2025-12-13 17:39:55 +08:00
Qiaolin Yu 77873343c4 tiny update: use rope kernel in sgl-kernel for amd (#14955) 2025-12-12 18:48:12 -08:00
yudian0504andluoyuan.luo 9496f12d00 [Model] Add PaddleOCR-VL Model Support (#12953)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-12-09 10:16:02 -08:00
Qiaolin Yu 661e9775d0 [2/2] Add rope kernel in sgl-kernel (#14452) 2025-12-07 21:37:29 -08:00
LiwansiandEven Zhou 432ecf841e [Ascend] qwen optimization (#12078)
Co-authored-by: Even Zhou <even.y.zhou@outlook.com>
2025-11-25 19:44:24 +08:00
YAMY 98b38de3f2 Fix: Safe RoPE Cache Expansion to Prevent Position-ID Out-of-Bounds in EAGLE + Long-Sequence Workloads (#11871) 2025-11-25 01:19:06 +08:00
Lianmin Zheng a352e833c4 CI: Kill zombie diffusion processes in CI & minor code style fix on rotary embedding fallback (#13637) 2025-11-20 21:57:01 +08:00
iLeGend 10e0b83a4c Add FP32 dtype support for RoPE - Part2 (#13328) 2025-11-19 21:19:53 -08:00
af6bcadcf7 [VLM] Support Piecewise CUDA Graph for Qwen2.5-VL (#13055)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Yuhao Yang <yhyang201@gmail.com>
2025-11-20 10:23:44 +08:00
DarkSharpness f969664172 [Performance] Move the contiguous to torch compile region (#13199) 2025-11-15 20:49:52 -08:00
c2e56dadb2 [Ascend] torch_npu.npu_mrope for MRotaryEmbedding (#10907)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
Co-authored-by: ssshinigami <44640852+ssshinigami@users.noreply.github.com>
2025-11-12 21:45:54 +08:00
Ke Bao db24d34603 Support piecewise cuda graph for MLA (#11812) 2025-11-10 09:13:48 +08:00
Lianmin Zhenggithub-actions[bot] <github-actions[bot]@users.noreply.github.com>Stefan He
0296f1cdad [Auto Sync] Update activation.py, logits_processor.py, rota... (20251107) (#12853)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Stefan He <hebiaobuaa@gmail.com>
2025-11-07 22:07:51 -08:00
Yuan Luoandluoyuan.luo bb517fe393 [HotFix] Disable torch dynamo for mrope_triton kernel (#12593)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-11-04 23:26:56 +08:00
fzyzcjy 326c84c493 Compiling rope while preserving true on policy (#12161) 2025-10-28 08:02:17 +08:00
Chunyuan WU c11b34d599 rope xpu: fix missing argument 'fused_set_kv_buffer_arg' and replace native with sgl_kernel_xpu impl (#12006) 2025-10-28 01:02:18 +08:00
Yuan Luoandluoyuan.luo f389f01714 Optimize triton_mrope with torch compile (#12112)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-10-27 23:49:22 +08:00
Yuxuan Zhang a88b006ecf GLM-4-0414 and GLM-4.1V Code Refactor (#12117) 2025-10-27 16:57:07 +08:00
fzyzcjy 20bd2271e2 Support true on-policy (#12058) 2025-10-25 10:23:42 +08:00
b8zhong 8ae9d4bb41 Revert "[ROCm] Remove vLLM rope dependency & use AITER impl" (#12028) 2025-10-23 12:42:59 -07:00
b8zhong 4d4feccbb2 [ROCm] Remove vLLM rope dependency & use AITER impl (#11322) 2025-10-22 19:17:34 -07:00
b113c72e7a Init attention backend for Intel XPU (#10656)
Co-authored-by: guangyey <guangye.yu@intel.com>
Co-authored-by: DiweiSun <105627594+DiweiSun@users.noreply.github.com>
2025-10-21 11:41:28 +08:00
zhangdonghao-zdh fb6cc7b000 Fix RotaryEmbedding for fp32 input (#11843) 2025-10-21 10:56:48 +08:00
74de76c685 Revise MRotaryEmbedding's forward (#11859)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: 羽癫 <yudian.zy@antgroup.com>
Co-authored-by: b8zhong <b8zhong@uwaterloo.ca>
2025-10-21 10:38:29 +08:00
271d3d0d50 Support mrope triton kernel and add unit test (#11722)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: b8zhong <b8zhong@uwaterloo.ca>
2025-10-20 11:51:07 +08:00
Liangsheng Yin 57e25de756 Revert "Fix: Dynamic RoPE Cache Expansion to Prevent Position-ID Out-of-Bounds in EAGLE + Long-Sequence Workloads" (#11827) 2025-10-19 19:44:06 +08:00
YAMY 80407b0493 Fix: Dynamic RoPE Cache Expansion to Prevent Position-ID Out-of-Bounds in EAGLE + Long-Sequence Workloads (#10788) 2025-10-19 11:37:43 +08:00
MickandXinyuan Tong 86b04d25b3 model: qwen3-omni (thinker-only) (#10911)
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
2025-10-16 13:20:38 -07:00
DiweiSunhuaiyuzhMa Mingfeicoderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
4c03dbaaef [CI][XPU]enable sglang CI on Intel XPU (#9493)
Co-authored-by: huaiyuzh <huaiyu.zheng@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
2025-10-15 17:13:19 -07:00
Mick f35f120d70 fix: fix video input for qwen3-vl (#11442) 2025-10-13 09:30:43 -07:00
Yuan Luoandluoyuan.luo 0b6f535f66 [Reland] perf: optimize qwen-vl with symm mem allreduce (#11457)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-10-13 17:51:25 +08:00
Lianmin Zheng b4408e6098 Revert "fix: fix video input for qwen3-vl" (#11437) 2025-10-10 12:44:40 -07:00
Cheng Wan 52fcbbb8bd Revert "perf: optimize qwen-vl with symm mem allreduce" (#11436) 2025-10-10 12:30:05 -07:00
Yuan Luoandluoyuan.luo 3b9d97f335 perf: optimize qwen-vl with symm mem allreduce (#11381)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-10-10 22:24:45 +08:00
Mick a1a20b4c7c fix: fix video input for qwen3-vl (#11361) 2025-10-10 04:35:35 -07:00
yhyang201 6130529143 Quick Fix: fix Qwen3-VL launch failure caused by MRotaryEmbedding arg (#10985) 2025-09-30 22:17:05 -07:00
Lianmin Zheng 07440f5f34 Fix FusedSetKVBufferArg in RotaryEmbedding (#11003) 2025-09-28 11:17:27 -07:00
YanbingJiang 66face3598 Fix CI failure of TypeError: RotaryEmbedding.forward_cpu() got an unexpected keyword argument 'fused_set_kv_buffer_arg' (#11009) 2025-09-28 00:31:08 -07:00
4f564b9e83 model: support qwen3-vl series (#10323)
Co-authored-by: ocss884 <ocss.lin@gmail.com>
Co-authored-by: cao1zhg <653506626@qq.com>
Co-authored-by: yhyang201 <yhyang201@gmail.com>
Co-authored-by: yhyang201 <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: 瑀澈 <yuche.lz@alibaba-inc.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Yineng Zhang <me@zhyncs.com>
2025-09-23 10:15:52 -07:00
ronnie_zhengandwangqihui01 095093ee5a [Ascend] optimize Qwen-vl on Ascend (#10556)
Co-authored-by: wangqihui01 <wangqh10@163.com>
2025-09-22 17:18:16 -07:00
Even Zhou d27a6f7092 [Feature] Add MLAProcess for DeepSeek MLA on NPU (#10130) 2025-09-22 17:17:48 -07:00
timmy-fengandNathan Wang 4ed9053ecf Remove mrope position sync (#9460)
Co-authored-by: Nathan Wang <nathan.r.wang@gmail.com>
2025-09-03 11:40:53 -07:00
VDV1985 ba861293cf [feat]Ascend NPU Gemma-3-12b and Gemma-3-27b support (#8909) 2025-08-31 00:25:07 -07:00
timmy-feng 61a0e600df torch.compile() mrope (#9487) 2025-08-21 23:01:08 -07:00
Jiaqi Guandfzyzcjy c9ee738515 Fuse writing KV buffer into rope kernel (part 2: srt) (#9014)
Co-authored-by: fzyzcjy <5236035+fzyzcjy@users.noreply.github.com>
2025-08-12 13:15:30 -07:00
137e75daa1 [Feature] Optimize DeepSeek's DeepEP on Ascend NPU (#8355)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
Co-authored-by: Hexq0210 <hexq0809521@gmail.com>
2025-08-09 01:35:00 -07:00
f29aba8c6e Support glm4.1v and glm4.5v (#8798)
Signed-off-by: Xinyuan Tong <justinning0323@outlook.com>
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <justinning0323@outlook.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: zRzRzRzRzRzRzR <2448370773@qq.com>
Co-authored-by: Minglei Zhu <mingleizhu1122@gmail.com>
Co-authored-by: Chang Su <csu272@usc.edu>
2025-08-09 00:59:13 -07:00
PGFLMG b7cd743038 [Feat] QWen-1M context support[2/2]: Update block sparse attention backend (#5949) 2025-08-06 23:49:36 -07:00