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285 Commits

Author SHA1 Message Date
Liangsheng Yin
e2c8a50b38 fix grammar timeout sync across tp ranks. (#16898) 2026-01-14 10:26:31 +08:00
Alison Shao
b880607108 Add 5090 dry run stage to PR test workflow (#17022) 2026-01-13 14:12:33 -08:00
YC Tseng
b1ee75ae7b [AMD] CI - enable test case for amd ci : triton_attention_kernels , torch_compile_moe (#16559) 2026-01-12 00:06:31 -08:00
Liangsheng Yin
934ae89abe Tiny fix typo minxin -> mixin (#16908) 2026-01-12 00:36:45 +08:00
Baizhou Zhang
8b5d426340 [CI]Move fa4 e2e test to 4-gpu-b200 runner (#16889) 2026-01-11 15:53:38 +08:00
Alison Shao
cc25f9df50 Update est_time for stage-b-test-small-1-gpu tests (#16835) 2026-01-11 12:03:43 +08:00
Leoyzen
cf14feba4d Fix parallel tool call parsing bug when tool parameters contain arrays (#16345) 2026-01-10 19:31:38 -08:00
Liangsheng Yin
78c41758ad [hot fix ci] Hot fix for the unregistered. (#16877) 2026-01-11 01:24:32 +08:00
fzyzcjy
dae6a4092a Tiny add scheduler status logging (#16872) 2026-01-10 20:12:24 +08:00
fzyzcjy
641830c1c2 Tiny extract file logging utils (#16870) 2026-01-10 20:02:37 +08:00
lg(x)
3a8b44fe89 Update LoRA Weights via Tensor (#16226) 
Co-authored-by: PopSoda2002 <zhouhp.me@gmail.com>
 2026-01-10 17:36:43 +08:00
Liangsheng Yin
3c358736d1 Enhance test for dp-attention + constrained decoding. (#16849) 2026-01-10 16:49:10 +08:00
Glen Liu
6327dff242 enhance LoRA tests and fix base model LoRA eviction in Scheduler (#16333) 2026-01-10 16:49:00 +08:00
Yuan Luo
ad20127359 [CI] Remove duplicate code in test_mamba_ut (#16854) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-10 16:16:56 +08:00
fzyzcjy
c89949bbaf Tiny let soft watchdog cover initialization phase (#16853) 2026-01-10 13:20:08 +08:00
fzyzcjy
32a569fb77 Tiny add CPU resource monitoring for overload diagnosis (#16852) 2026-01-10 12:48:18 +08:00
fzyzcjy
3ed3b7ef7c Tiny add routing key distribution metrics (#16847) 2026-01-10 12:06:40 +08:00
Liangsheng Yin
e6d40bff81 Revert "feat: reduce constrained-decoding overhead in TP" (#16845) 2026-01-10 11:39:38 +08:00
fzyzcjy
1f0ea4f958 Add routing key based schedule policy (#16840) 2026-01-10 10:16:23 +08:00
Alison Shao
ef35d8fe4e Migrate VLM tests and remove unit-test-backend-1-gpu job (#16679) 2026-01-09 15:24:26 -08:00
Yuan Luo
08636f72b5 [Fix CI] Fix test_mamba_unittest.py (#16810) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-09 15:03:47 -08:00
Liangsheng Yin
7066711529 [ci hot fix] fix global server args init for mamba ut (#16821) 2026-01-10 02:03:32 +08:00
Leoyzen
8ef5b90528 Fix GLM-4.7 MoE Detector complex JSON Schema type parsing (#15753) 2026-01-10 01:21:10 +08:00
Raayan Dhar
76b3c698d6 feat: reduce constrained-decoding overhead in TP (#13947) 
Signed-off-by: Raayan Dhar raayan.dhar@gmail.com <raayan.dhar@gmail.com>
Signed-off-by: raayandhar <raayan.dhar@gmail.com>
 2026-01-10 00:38:32 +08:00
Alison Shao
e46f79431b Fix external_models import path and migrate model loading tests (#16458) 2026-01-08 23:43:49 -08:00
Michael
fcec35dc4a [AMD] Add MI35x nightly CI tests (#16588) 
Co-authored-by: michaelzhang-ai <michaelzhang-ai@users.noreply.github.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
 2026-01-08 19:29:15 -08:00
Alison Shao
a979927727 Skip causal_conv1d test with padded batches due to Triton kernel bug (#16715) 2026-01-08 15:13:13 -08:00
YC Tseng
4e999404c3 [AMD] Fix CI - unit-test-backend-1-gpu-amd-mi35x and unit-test-backend-2-gpu-amd, stage-b-test-small-1-gpu-amd (#16675) 
Co-authored-by: Bingxu Chen <bingxche@amd.com>
 2026-01-08 10:16:27 -08:00
fzyzcjy
b6e8a0d851 Add file size hints in bitwise model file verifier (#16735) 2026-01-08 22:28:52 +08:00
fzyzcjy
83abecd0c2 Support pre-generating and using expected checksums (#16730) 2026-01-08 20:26:13 +08:00
fzyzcjy
d54f0a10b4 Support bitwise weight checksum verifier (#16729) 2026-01-08 20:19:25 +08:00
Bingxu Chen
f9c0426692 [AMD CI] re-enable testcases missed when migrating ci test files (#16535) 
Co-authored-by: michael-amd <michael.zhang@amd.com>
Co-authored-by: yctseng0211 <yctseng@amd.com>
 2026-01-07 22:43:48 -08:00
Alison Shao
63cc97f4ef ci: migrate 2-GPU tests to test/registered/ (#16529) 2026-01-07 20:28:16 -08:00
Yuwei An
154740bd4d Disable PCG TP Unittest (#16693) 
Signed-off-by: Oasis-Git <ayw.sirius19@gmail.com>
 2026-01-07 19:59:47 -08:00
Harish
156d97b219 Fix KeyError when logprobs=false in completions endpoint (#16095) 2026-01-07 15:49:02 -08:00
Alison Shao
3a4767daa3 Fix pytest tests to exit with proper exit code (#16681) 2026-01-07 15:20:46 -08:00
Alison Shao
0241e0460f Migrate tokenizer tests to test/registered/tokenizer/ (#16457) 2026-01-07 13:21:16 -08:00
Alison Shao
0c474273c5 Fix gpt_oss_common import path and migrate core tests (#16426) 2026-01-07 12:58:32 -08:00
Baizhou Zhang
153c69f63d [CI] Enable dpsk v31 test on nightly H200 (#16660) 2026-01-07 23:21:19 +08:00
Douglas Yang
2ff872311b ci: adding llama4 placeholder test to nightly (#16599) 2026-01-07 21:51:30 +08:00
Alison Shao
6b8a9d7058 fix: update AMD CI estimated time for test_torch_compile (#16631) 2026-01-06 23:42:18 -08:00
Douglas Yang
5c04088b3a fix: remove performance testing from nightly dpsk v32 cp single node (#16582) 2026-01-07 13:38:31 +08:00
Alison Shao
52de807dd7 Migrate profiling tests to test/registered/profiling/ (#16459) 2026-01-06 21:04:48 -08:00
Alison Shao
70933f34f1 Migrate attention unit tests to test/registered/attention/ (#16465) 2026-01-06 20:50:54 -08:00
Alison Shao
ce453fa43b Migrate backends tests to CI registration system (#16468) 2026-01-06 20:31:52 -08:00
Douglas Yang
951d16c890 fix: adjusting vlm accuracy thresholds (#16593) 2026-01-06 19:41:05 -08:00
Yuwei An
2a8d5493f3 PCG Unit Test Adjustment (#16609) 
Signed-off-by: Oasis-Git <ayw.sirius19@gmail.com>
 2026-01-07 10:57:15 +08:00
Alison Shao
90eac38a12 Migrate FP8/TorchAO tests to test/registered/quant/ (#16453) 2026-01-06 18:27:43 -08:00
fzyzcjy
d874c8bba4 Tiny support http headers in bench serving (#16606) 2026-01-07 10:15:17 +08:00
Alison Shao
399d5283f8 ci: migrate scheduler tests to test/registered/scheduler/ (#16442) 2026-01-06 14:55:52 -08:00