Commit Graph

12 Commits

Author SHA1 Message Date
shaharmor98
82a0bafc1c Feat/add fi selective state update kernel call (#18070)
Signed-off-by: Shahar Mor <smor@nvidia.com>
2026-02-19 16:56:06 +08:00
SoluMilken
07a24f1a38 update pre-commit config (#18860) 2026-02-16 00:18:31 +08:00
YC Tseng
20554a0a4f [AMD] rocm 7.2 image release, PR test, Nightly Test (#17799)
Co-authored-by: Alan Kao <akao@amd.com>
Co-authored-by: bingxche <Bingxu.Chen@amd.com>
Co-authored-by: Michael <13900043+michaelzhang-ai@users.noreply.github.com>
2026-02-11 21:29:25 -08:00
DiweiSun
495290aefd enable ut test for xpu devices (#11712)
Co-authored-by: jundu <jun.du@intel.com>
Co-authored-by: Gao, Pengfei <pengfei.gao@intel.com>
2026-02-03 11:15:14 -08:00
Alison Shao
a0bae4c343 Migrate 4-GPU/8-GPU workflow jobs to stage-c and add CI registry decorators (#17299) 2026-01-31 22:37:22 -08:00
Alison Shao
146b5fcc84 [CI] Reorganize stage-b 1-GPU tests for 5090 compatibility (#16826) 2026-01-15 15:23:35 -08:00
Bingxu Chen
98096b5e02 [AMD CI] migrate and re-enable CI tests to new CI registry (#16949)
Co-authored-by: yctseng0211 <yctseng@amd.com>
2026-01-14 21:25:25 -08:00
Netanel Haber
e75299a111 Fix issues/16714: Revert comment out of tl.debug_barrier() in causal_conv1d_triton (#16899)
Co-authored-by: Yi Zhang <1109276519@qq.com>
2026-01-14 17:26:48 +08:00
Alison Shao
b880607108 Add 5090 dry run stage to PR test workflow (#17022) 2026-01-13 14:12:33 -08:00
Alison Shao
a979927727 Skip causal_conv1d test with padded batches due to Triton kernel bug (#16715) 2026-01-08 15:13:13 -08:00
Alison Shao
3a4767daa3 Fix pytest tests to exit with proper exit code (#16681) 2026-01-07 15:20:46 -08:00
Alison Shao
4a9537a495 ci: migrate Mamba/Layers tests to test/registered/layers/mamba/ (#16419) 2026-01-05 19:12:47 -08:00