4 Commits

Include renames

Author	SHA1	Message	Date
Lianmin Zheng	cea79530f8	ci: merge CPU default and stage-a-cpu-only suites (#20992)	2026-03-20 00:04:55 -07:00
fzyzcjy	003ad6daaa	Support partial tensors waiting for reduction and pipeline parallel in dump comparator (#19595)	2026-03-01 10:33:39 +08:00
fzyzcjy	d34d5aca07	Support loading token aligner data in dump comparator (#19376)	2026-02-26 10:03:56 +08:00
fzyzcjy	e8dd14519d	Add aligner entrypoint and bundle handler in dump comparator (#19375)	2026-02-26 10:03:22 +08:00