 Lianmin Zheng
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67e34c56d7
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Fix install instructions and pyproject.tomls (#11781)
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2025-10-18 01:08:01 -07:00 |
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Yuwei An
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1d726528f7
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Eager Compiler for Torch Compile (#11803)
Signed-off-by: Oasis-Git <ayw.sirius19@gmail.com>
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2025-10-18 15:18:52 +08:00 |
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Minglei Zhu
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f4488e9dd9
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set default attention backend for deterministic inference (#11801)
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2025-10-18 00:01:24 -07:00 |
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Zilin Zhu
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e68a2b5b2f
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[RL] use cpu group to prepare_mlp_sync_batch_raw when the server is offloaded (#10152)
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2025-10-18 14:29:35 +08:00 |
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Zilin Zhu
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31b9f19e54
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[RL] support weight update with DP attention (#11669)
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2025-10-18 14:26:19 +08:00 |
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JimmyandShangming Cai
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f7ab955455
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fix(glm45): disable reduce scatter (#11665)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2025-10-18 12:19:20 +08:00 |
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Chang Su
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ca240eefb4
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[router][grpc] Support parallel queue puts in grpc_request_manager and remove mutex for grpc_client (#11798)
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2025-10-17 20:49:43 -07:00 |
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Cheng Wan
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5b214b50b6
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[Refactor] move deep_gemm_wrapper out of quantization (#11784)
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2025-10-17 18:57:54 -07:00 |
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Minglei ZhuandBaizhou Zhang
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13219e1e48
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completely remove mixed mode deterministic test as prefix mode could cover it (#11783)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2025-10-17 17:46:03 -07:00 |
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fzyzcjy
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33e9bbec35
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Make single-batch overlap compatible with offloading (#11614)
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2025-10-18 08:45:54 +08:00 |
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fzyzcjy
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dcb8f090ad
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Super tiny fix CI (#11788)
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2025-10-17 17:41:58 -07:00 |
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9eefe2c0b7
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Set CUDA_VISIBLE_DEVICES to achieve one GPU per process (#9170)
Co-authored-by: SangBin Cho <rkooo567@gmail.com>
Co-authored-by: Cheng Wan <cwan@x.ai>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
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2025-10-17 17:30:06 -07:00 |
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Zilin Zhu
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69fe3c9726
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Manually flip deepep_mode for cuda_graph (#11666)
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2025-10-18 08:05:48 +08:00 |
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fzyzcjy
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8af8491298
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Support casting bf16 NextN moe to fp8 (#11613)
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2025-10-18 08:02:15 +08:00 |
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fzyzcjy
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505329cab0
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Support shared experts overlap in cutlass moe (#11611)
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2025-10-18 07:59:40 +08:00 |
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fzyzcjy
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8a382fd399
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Super tiny fix missing input throughput (#11607)
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2025-10-18 07:58:48 +08:00 |
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Chang Su
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627974405d
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[Lint] Add python/sglang to ruff F401 checks and remove unused imports in files (#11685)
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2025-10-17 16:49:46 -07:00 |
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Antonin Vidon
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2614adf9ca
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[Fix] Skip visual layers when applying LoRA to Qwen2VL modules (#11519)
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2025-10-17 17:39:57 -05:00 |
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fdd7c69d65
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[Auto Sync] Update common.py (20251017) (#11782)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
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2025-10-17 15:03:42 -07:00 |
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b9a54e0968
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[minor] sync code on python/sglang/test/test_deterministic.py and improve ci tests (#11777)
Co-authored-by: Stefan He <hebiaobuaa@gmail.com>
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
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2025-10-17 14:25:22 -07:00 |
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Baizhou Zhang
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20b8d2306c
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Cleaning indexer for DeepSeek V3.2 (#11682)
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2025-10-17 13:47:21 -07:00 |
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Yineng Zhang
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b79f75fd53
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[Auto Sync] Update scheduler.py (20251017) (#11738)
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2025-10-17 12:36:07 -07:00 |
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Chunyuan WU
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8fcc69e7c4
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Turn on shm_allreduce and shm_allgather for fp16 (#10725)
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2025-10-17 12:35:20 -07:00 |
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ykcombat
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f440baa136
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[Feature] Reuse flashinfer workspace for PD-Multiplexing. (#11540)
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2025-10-18 02:35:06 +08:00 |
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Yineng Zhang
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da681f35d3
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Revert "Set csgmv as default lora backend. (#11488)" (#11735)
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2025-10-17 12:01:36 -05:00 |
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pdasgupandXinyuan Tong
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9b0f725b1d
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add tuned fuse moe kernel for qwen3 235b fp8 on h200 (#11730)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2025-10-17 09:55:09 -07:00 |
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Liangsheng Yin
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cde5a6e30f
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Abstraction for spec worker and code cleanup (#11643)
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2025-10-17 23:31:36 +08:00 |
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Mick
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3e4c7da2f5
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ci: reduce and refactor vlm ut and combine test files (#11062)
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2025-10-17 15:24:50 +00:00 |
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Liangsheng Yin
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d88ac9bc9a
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[overlap-spec] Make plan stream an option (#11724)
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2025-10-17 15:48:57 +08:00 |
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Liangsheng Yin
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ce11dd82dc
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[CI] Try fix broken event loop init (#11746)
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2025-10-17 13:30:17 +08:00 |
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StonyPortandqiuxuan.lzw
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fd389df96e
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Reduce the image processing latency in VLM (#11541)
Co-authored-by: qiuxuan.lzw <qiuxuan.lzw@alibaba-inc.com>
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2025-10-16 15:00:03 -07:00 |
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Baizhou Zhang
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b0d1d717e1
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Revert "make radix cache deterministic" (#11728)
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2025-10-16 14:36:15 -07:00 |
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Simo Lin
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4f24ab1718
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[router][grpc] add dissag info to warm up in grpc server (#11727)
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2025-10-16 14:19:55 -07:00 |
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MickandXinyuan Tong
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86b04d25b3
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model: qwen3-omni (thinker-only) (#10911)
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
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2025-10-16 13:20:38 -07:00 |
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sglang-botandsglang-bot
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85ebeecf06
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chore: bump SGLang version to 0.5.3.post3 (#11693)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
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2025-10-16 13:14:55 -07:00 |
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Hank Han
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0dd6cf16ba
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[ci]use H20 to run disaggregation test (#11543)
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2025-10-16 11:42:42 -07:00 |
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Even Zhou
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3cceaa381a
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[Bugfix] Fix Qwen3/DSV3/DSV3.2 model support (#11510)
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2025-10-16 15:14:09 +08:00 |
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Lifu Huang
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b0d20cdec7
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Set csgmv as default lora backend. (#11488)
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2025-10-15 23:53:24 -05:00 |
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YanbingJiangandMa Mingfei
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cbac499750
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Split test_intel_amx_attention_backend.py to pass CI of timeout (#11370)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2025-10-15 19:22:32 -07:00 |
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Shangming Cai
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476c67d7fc
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Fix missing a2a backend init of GLM4.5 MoE Block (#11692)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
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2025-10-15 19:13:08 -07:00 |
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868403f642
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[PD] Add PD support for hybrid model (Qwen3-Next, DeepSeek V3.2 Exp) (#10912)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: ZeldaHuang <hzm414167@alibaba-inc.com>
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2025-10-15 18:59:14 -07:00 |
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Hanming Lu
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97d857c096
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[Mamba] Increase default mamba_full_memory_ratio to 0.9 (#11679)
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2025-10-16 09:56:43 +08:00 |
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Lianmin Zheng
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cd7e1bd591
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Sync code and test CI; rename some env vars (#11686)
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2025-10-15 18:37:03 -07:00 |
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Huaiyu, Zheng
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729b7edf72
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enable rmsnorm on XPU (#10248)
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2025-10-15 17:54:18 -07:00 |
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4c03dbaaef
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[CI][XPU]enable sglang CI on Intel XPU (#9493)
Co-authored-by: huaiyuzh <huaiyu.zheng@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
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2025-10-15 17:13:19 -07:00 |
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sglang-botandsglang-bot
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baf277a9bf
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chore: bump SGLang version to 0.5.3.post2 (#11680)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
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2025-10-15 16:49:14 -07:00 |
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Chang Su
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f226d3da2a
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Fix missing json imports in serving_responses.py (#11681)
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2025-10-15 13:01:55 -07:00 |
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Chang SuandXinyuan Tong
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30ea4c462b
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[tool call] Fix prev_tool_call_arr management in base_format_detector.py (#11367)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2025-10-15 09:51:51 -07:00 |
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Shangming CaiandLiangsheng Yin
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6d0364681c
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Fix 1-step draft model forward (#11653)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Liangsheng Yin <lsyincs@gmail.com>
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2025-10-15 19:11:33 +08:00 |
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Liangsheng Yin
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8221f9ae8b
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Tiny cleanup some eagle unused codes (#11660)
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2025-10-15 17:24:08 +08:00 |
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