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94371dbbd6
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[feature] Ascend NPU graph support (#8027)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
Co-authored-by: yezhifeng (D) <y00897525@china.huawei.com>
Co-authored-by: anon189Ty <Stari_Falcon@outlook.com>
Co-authored-by: Maksim <makcum888e@mail.ru>
Co-authored-by: ssshinigami <44640852+ssshinigami@users.noreply.github.com>
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2025-08-16 17:25:17 -07:00 |
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Trevor Morris
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eff4eb3fdd
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Add fp4 quantize before all-gather for Flashinfer cutlass MoE DP (max throughput) (#7667)
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2025-08-15 22:08:11 -07:00 |
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Cheng Wan
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84b006b278
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Cleanup MoE Refactor (#9223)
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2025-08-15 02:28:33 -07:00 |
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Cheng Wan
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295895120d
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[6/N] MoE Refactor: Cleanup MoE-related configs (#8849)
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2025-08-14 21:14:53 -07:00 |
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Cheng Wan
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b87aacb5c5
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[DP Attention] Refactor: adding some utility functions (#9136)
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2025-08-13 21:08:06 -07:00 |
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Faraz
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f508cd3cb7
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TRTLLM-MLA FP8 path (#8638)
Signed-off-by: Faraz Khoubsirat <58580514+farazkh80@users.noreply.github.com>
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2025-08-11 14:02:13 -07:00 |
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Xiaoyu Zhang
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44e86480e8
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fuse allreduce and residual_rmsnorm (#8731)
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2025-08-11 13:50:53 -07:00 |
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Trevor Morris
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c0e84297c2
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Use reduce scatter for DP (#8539)
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2025-08-06 16:21:26 -07:00 |
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d4bf5a8524
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Support OCP MXFP4 quantization on AMD GPUs (#8255)
Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: Hubert Lu <Hubert.Lu@amd.com>
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2025-08-04 18:14:52 -07:00 |
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azhurkevichandCheng Wan
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915140fd18
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[NVIDIA] Add Low Latency NVFP4 decode kernels from Flashinfer (#8552)
Co-authored-by: Cheng Wan <cwan@x.ai>
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2025-08-04 03:10:02 -07:00 |
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Nicolas Castet
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82e6c3a65a
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Add support for NCCL symmetric memory for TP allreduces (#8238)
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2025-08-01 23:30:55 +00:00 |
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Cheng Wan
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6c88f6c8d9
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[5/N] MoE Refactor: Update MoE parallelism arguments (#8658)
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2025-08-01 01:20:03 -07:00 |
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Baizhou Zhang
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e7e5a3050a
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Update batch size limitation of dsv3_router_gemm kernel to 16 (#8051)
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2025-08-01 11:53:31 +08:00 |
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Kaixi Houandkushanam
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aa4c66b564
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[NVIDIA] Enable Flashinfer MoE blockscale fp8 backend for TP MoE (#8450)
Co-authored-by: kushanam <42385577+kushanam@users.noreply.github.com>
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2025-07-31 19:56:34 -07:00 |
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Faraz
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4b04998d38
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TRTLLM Gen MLA Decode Kernel Integration (same as #7938) (#8632)
Signed-off-by: Faraz Khoubsirat <58580514+farazkh80@users.noreply.github.com>
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2025-07-31 16:03:40 -07:00 |
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Cheng Wan
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9effeb5bdd
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Support EPLB in FusedMoE (#8448)
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2025-07-29 16:02:41 -07:00 |
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Cheng Wan
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9c138a0445
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[3/N] MoE Refactor: Simplify DeepEP Output (#8421)
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2025-07-28 11:37:17 -07:00 |
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2810338401
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[feat] Support different attention backends for prefill and decode (#6338)
Co-authored-by: tianqilin.99 <tianqilin.99@bytedance.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2025-07-28 11:42:29 +08:00 |
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Kaixi Hou
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85486b6f6f
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[NVIDIA] Add Flashinfer MoE blockscale fp8 backend (#8036)
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2025-07-27 00:34:41 -07:00 |
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Cheng Wan
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c0fb25e949
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DP Enhancement (#8280)
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2025-07-24 21:36:21 -07:00 |
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Ke Bao
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6936be3221
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Remve router gemm output dtype conversion (#8204)
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2025-07-21 15:37:00 +08:00 |
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Atream
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a589a07167
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fix moe gate dtype, fix tbo, fix fake dispatch (#7825)
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2025-07-19 22:13:46 -07:00 |
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Cheng Wan
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15ad6c9086
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[1/N] MoE Refactor: refactor select_experts (#7966)
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2025-07-19 00:51:15 -07:00 |
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Hubert Lu
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7750b91ca8
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[AMD] Add triton awq_dequantize kernel to support AWQ on ROCm (#7661)
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2025-07-18 14:27:25 -07:00 |
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Hongbo XuandAniZpZ
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1f76fc8747
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[3/n] chore: decouple AWQ implementation from vLLM dependency (#8113)
Co-authored-by: AniZpZ <zhuangsen.zp@antgroup.com>
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2025-07-18 11:45:22 -07:00 |
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strgrbandZhang Kaihong
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194841e329
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remove kv_a.congigous in DeepseekV2AttentionMLA (#8058)
Co-authored-by: Zhang Kaihong <zhangkaihong.zkh@alibaba-inc.com>
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2025-07-15 18:20:41 -07:00 |
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Albert
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38216cf049
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concurrently load weights of DeepseekV2ForCausalLM (#7943)
Signed-off-by: Tianyu Zhou <albert.zty@antgroup.com>
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2025-07-15 13:41:19 -07:00 |
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Chunyuan WU
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07452cbe8e
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[CPU] fix no attribute 'can_fuse_mlp_allreduce' error (#8010)
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2025-07-14 01:32:43 -07:00 |
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Cheng Wan
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98aa836bbf
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Overlap the gating function with shared experts in DeepSeek (#7978)
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2025-07-12 13:41:50 -07:00 |
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fzyzcjy
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2a2d3478af
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Fix wrong gemm branch cause 250us slower (#7969)
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2025-07-11 19:45:09 -07:00 |
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Xiaoyu Zhang
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aa2056091a
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delete uselese code caused by fuse allreduce+add_rmsnorm pr (#7970)
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2025-07-11 19:43:38 -07:00 |
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Xiaoyu Zhang
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49a5915f53
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[ready b200] fuse allreduce+add_rmsnorm in prepare_attention + mlp module (#7775)
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2025-07-10 15:12:39 -07:00 |
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Yineng Zhang
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b6b6268ccf
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Revert "Embedding parallel by attn_tp (#7623)" (#7880)
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2025-07-08 22:03:09 -07:00 |
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SijiaYang
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cb9d91ea8a
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feat: support DeepSeek-R1-W4AFP8 model with ep-moe mode (#7762)
Signed-off-by: yangsijia.614 <yangsijia.614@bytedance.com>
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2025-07-07 14:47:21 -07:00 |
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JieXin Liang
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54411f6afa
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fix: disable dsv3_router_gemm in dsv3_nextn (#7793)
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2025-07-05 19:01:01 -07:00 |
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JieXin Liang
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c04a8a820b
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[fix] fix misusing of is_cuda (#7790)
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2025-07-05 04:02:14 -07:00 |
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Cheng Wan
|
8fc910db03
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DP Attention with Auto DeepEP Dispatch (#7222)
|
2025-07-05 01:54:24 -07:00 |
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Gang Chen
|
ef8a29c429
|
Embedding parallel by attn_tp (#7623)
|
2025-07-04 23:21:56 -07:00 |
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Cheng Wan
|
cb432f1770
|
saving hidden_states.clone() (#7705)
|
2025-07-04 20:07:42 -07:00 |
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Chunyuan WU
|
9fcc9a80e7
|
[CPU] refine CPU integration code (#7647)
|
2025-07-03 09:51:09 -07:00 |
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JieXin Liang
|
ac49dac009
|
[fix] fix dsv3_router_gemm filter (#7750)
|
2025-07-03 09:25:32 -07:00 |
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|
|
1e0e549766
|
Ascend attention backend(PA&MLA) (#7722)
Co-authored-by: Maksim <makcum888e@mail.ru>
Co-authored-by: VDV1985 <vladdv85@mail.ru>
|
2025-07-03 09:23:19 -07:00 |
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AniZpZ
|
b58226510f
|
fix dsv3 fused proj check (#7738)
|
2025-07-03 01:52:44 -07:00 |
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AniZpZ
|
84f2e4a0f8
|
fix awq and dsv3 fused gemm compatible (#7735)
|
2025-07-02 22:56:57 -07:00 |
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Baizhou Zhang
|
88f484ce4c
|
Apply dsv3 router gemm kernel for deepseek-r1 fp4 (#7677)
|
2025-07-02 12:30:18 -07:00 |
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|
Ke Bao
|
00aec6ad6c
|
Apply dsv3_fused_a_gemm kernel (#7635)
|
2025-07-01 22:32:05 -07:00 |
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fzyzcjy
|
0c9c6c75a8
|
Move files related to EPLB (#7580)
|
2025-06-29 15:39:38 -07:00 |
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Chunyuan WUandZheng, Beilei <beilei.zheng@intel.com>
|
a5317b2fd3
|
[CPU] add optimizations for INT8 and FP8 DeepSeek (#6769)
Co-authored-by: Zheng, Beilei <beilei.zheng@intel.com>
|
2025-06-27 19:04:29 -07:00 |
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valarLip
|
802815e40b
|
take aiter get_rope back (#7521)
|
2025-06-25 02:03:33 -07:00 |
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Chunyuan WUandThien Tran
|
7eb47b0f3d
|
[CPU] [BF16] Call fused_experts_cpu, weight_packed_linear and bmm_cpu kernel in DeepSeek model (#6641)
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
|
2025-06-25 01:43:33 -07:00 |
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