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109 Commits

Author SHA1 Message Date
Baizhou Zhang
42f4b7276c Revert "feat(mm)(grpc): compute M-RoPE positions for preprocessed VL inputs" (#20956) 2026-03-19 18:03:04 -07:00
Chang Su
0d23a461a0 feat(mm)(grpc): compute M-RoPE positions for preprocessed VL inputs (#19973) 
Signed-off-by: Chang Su <chang.s.su@oracle.com>
Co-authored-by: Chang Su <chang.s.su@oracle.com>
 2026-03-18 15:34:50 -07:00
Xinyuan Tong
6b8a6545b2 Add Mistral Small 4 (Pixtral) support (#20708) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Alex Nails <alexnails@radixark.ai>
Co-authored-by: Dimitrios Bariamis <12195802+dbari@users.noreply.github.com>
Co-authored-by: dbari <dbari@users.noreply.github.com>
 2026-03-18 14:15:32 -07:00
Xinyuan Tong
d1e95af282 Upgrade transformers==5.3.0 (#17784) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Kangyan-Zhou <zky314343421@gmail.com>
Co-authored-by: Alison Shao <alisonshao@mac.lan>
Co-authored-by: Mick <mickjagger19@icloud.com>
 2026-03-18 13:50:43 -07:00
Zheng Wengang
135af6dc92 [EPD][VLM] support video/audio input (#17824) 
Co-authored-by: siyu <liusy58@linux.alibaba.com>
 2026-03-16 14:18:21 +08:00
Juan Muneton
7458407437 Fix InternVL and vision attention for non-CUDA backends (e.g. XPU) (#19997) 
Co-authored-by: Yang Wang <mr.yang.wang@outlook.com>
 2026-03-14 23:24:41 -07:00
Kurkur
55e6acf834 [NPU][QwenVL] Support qwen image preprocess on npu (#20189) 2026-03-11 15:03:08 +08:00
Michael
dc4380e33a [AMD] [DeepSeek-OCR-2 Day 0] Enable DeepSeek-OCR-2 on AMD GPUs and add nightly test (#19732) 2026-03-10 17:04:35 -07:00
Xinyuan Tong
4a757990a1 [VLM] Replace decord with torchcodec for video decoding (#20055) 
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: BakerBunker <17872844+BakerBunker@users.noreply.github.com>
 2026-03-09 19:23:49 +08:00
Ken J
44208d2adf [vlm][minicpm] support input formats of processor output and embedding (#19614) 2026-03-04 12:11:12 -05:00
Ken J
f0c2089597 [vlm][internVL] Support processor and embedding inputs for InternVL (#19127) 2026-02-26 22:46:48 -08:00
Xinyuan Tong
581bf53e03 Whisper model support & /v1/audio/transcriptions endpoint & benchmark (#16983) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: MahmoudAshraf97 <hassouna97.ma@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
 2026-02-23 17:28:37 -08:00
Alison Shao
206accd15d Fix GLM-4V processor registration when glm_ocr is unavailable (#18885) 2026-02-16 16:02:31 +08:00
SoluMilken
07a24f1a38 update pre-commit config (#18860) 2026-02-16 00:18:31 +08:00
Zheng Li
27c447653d model: support Qwen3.5 (#18489) 
Co-authored-by: 瑀澈 <yuche.lz@alibaba-inc.com>
 2026-02-10 00:27:59 +08:00
RunningLeon
3e7ecb78a6 model: support interns1-pro (#18145) 
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
 2026-02-05 00:22:44 +08:00
linhaifeng
2c036f1eb1 [Bugfix] fix the display error (inconsistent context) (#17699) 
Signed-off-by: linhaifeng <1371675203@qq.com>
 2026-01-31 23:35:11 -08:00
Zheng Li
0c5a81acb8 [BUGFIX] Fix dp size > 1 for qwen3 vl model (#17624) 
Co-authored-by: yizhang2077 <1109276519@qq.com>
 2026-01-30 20:44:25 +08:00
baonudesifeizhai
84ab611af8 model: support DeepSeek-OCR-2 (#17897) 2026-01-30 09:49:51 +08:00
Shivam jindal
0769de9b0f Support LightOnOCR-2-1B (#17806) 2026-01-29 23:03:41 +08:00
Yuxuan Zhang
7106f6c8e1 [GLM-OCR] Support GLM-OCR Model (#17582) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
 2026-01-26 22:24:00 -08:00
Yuhao Yang
479ab7a4e7 model: support Kimi-K2.5 (#17789) 
Co-authored-by: Mick <mickjagger19@icloud.com>
 2026-01-27 10:57:00 +08:00
Mahdi-CV
539924037f fix(processor): support InternS1 text_config in InternVL processor (#17040) 
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
 2026-01-26 13:02:54 -08:00
CSWYF3634076
1a19b3987d [Model] Add Ernie4.5 VL model support (#15679) 
Signed-off-by: CSWYF3634076 <wangyafeng@baidu.com>
Signed-off-by: wangyafeng <wangyafeng@baidu.com>
 2026-01-25 22:36:29 -08:00
siyu
62e6a749b0 Skip mm feature pool init to avoid EPD OOM (#16388) 2026-01-23 10:53:45 +08:00
Yuhao Yang
f7a0bcda1e model: step3-vl-10b (#17513) 2026-01-22 23:15:08 +08:00
Zaili Wang
6a8f68b6d2 [Fix] fix device orientation for image processor (#15859) 2026-01-22 15:03:10 +08:00
Yuan Luo
6d29d8ab16 [VLM][Reland] Refactor load_mm_data to improve performance (#16152) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-18 14:11:17 +08:00
Yuan Luo
feae615b11 [VLM] Support ViT CUDA Graph for InternVL (#16732) 2026-01-14 17:29:23 +08:00
Yuan Luo
53846746bf [VLM] Fix CUDA IPC OOM (#16118) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-07 11:30:35 +08:00
Netanel Haber
bebd625ba1 EVS Framework: Support NemotronH_Nano_VL_V2 (#14051) 2026-01-05 16:18:07 +08:00
Yuan Luo
5f3eb377e0 [VLM] Support request level max_dynamic_patch for OpenAI request (#16268) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-04 13:04:43 +08:00
Nan Jiang
7254986342 [VLM] feat: true on policy for vlm + fsdp (#14636) 
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
 2026-01-01 16:54:39 -08:00
Yuan Luo
94bcc19bce [VLM] Support Video for InternVL3_5 (#15942) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-12-30 17:07:49 +08:00
Lianmin Zheng
93495dcac9 Revert "[VLM] Refactor load_mm_data to improve performance" (#15911) 2025-12-26 13:43:18 -08:00
Yuan Luo
086813ae8a [VLM] refactor: refactor load_mm_data to improve performance (#14644) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-12-26 13:17:53 +08:00
Yuxuan Zhang
f3ba711662 fix: change class name of GLM-ASR (#15772) 2025-12-26 00:15:16 +08:00
Yuxuan Zhang
82f1d6157f [GLM-ASR] GLM-ASR Support (#15570) 
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
 2025-12-22 17:37:55 -08:00
Yuan Luo
019517a356 [VLM] Support ViT Piecewise CUDA Graph for Qwen3-VL (#15320) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-12-20 21:00:07 +08:00
mlmz
1f1f05a85e vlm: refactor engine vlm params and support processor output as input (#14091) 
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: zhaochenyang20 <zhaochenyang20@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: BenYao21 <cyao22@asu.edu>
Co-authored-by: minleminzui <minleminzui@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: 赵晨阳 <zhaochen20@outlook.com>
 2025-12-20 18:31:24 +08:00
Jackie
5045aa34d3 Add MiDasheng Model Support (#15219) 2025-12-19 21:41:59 +08:00
Yuhao Yang
3d42b7e7b0 unified management of environment variables for vlm cuda ipc transport (#14501) 2025-12-18 12:28:06 +08:00
Tianyu Guo
9acb21ae27 feat: support EPD disaggregation (#12263) 
Co-authored-by: liusy58 <liusy58@linux.alibaba.com>
Co-authored-by: ZhengWG <zwg0606@gmail.com>
Co-authored-by: Nicholas <45984215+liusy58@users.noreply.github.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
 2025-12-14 22:30:08 +08:00
Yuan Luo
3b8a824b8b [VLM] Support VLM ViT Piecewise CUDA Graph (#14422) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: kousakawang <wanghanpei@bytedance.com>
 2025-12-13 20:49:40 +08:00
yudian0504
9496f12d00 [Model] Add PaddleOCR-VL Model Support (#12953) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-12-09 10:16:02 -08:00
Xinyuan Tong
6d37e70883 ministral3 (#14251) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Yueming Yuan <yy28@illinois.edu>
 2025-12-04 14:31:26 -08:00
Daniel Cámpora
8428078436 Add Mistral Large 3 support. (#14213) 
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Linda-Stadter <57756729+Linda-Stadter@users.noreply.github.com>
 2025-12-04 20:00:05 +08:00
Yuan Luo
630a693081 [VLM] Boost Memory Pool based CUDA IPC (#14123) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-12-01 17:17:46 +08:00
Netanel Haber
082b54c689 Support nvidia/NVIDIA-Nemotron-Nano-12B-v2-VL-BF16 (and nvidia/C-RADIOv2-H) (#12277) 2025-11-26 16:28:52 -07:00
Yuan Luo
ca5c8b16f6 [VLM] Support InternVL Vision Encoder Data Parallelism (#13925) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2025-11-26 11:43:05 +08:00