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703 Commits

Author SHA1 Message Date
Gaoji Liu
858a4d659b support new qwen3_coder_detector (#16744) 
Co-authored-by: liugaoji.lgj <liugaoji.lgj@alibaba-inc.com>
 2026-01-18 21:16:27 -08:00
Lee Nau
84c8390514 Use dsv3 optimized routing fused_topk_deepseek instead of moe_fused_gate (#15347) 2026-01-19 11:50:16 +08:00
Glen Liu
ad1b4e4728 [Feature] overlap LoRA weight loading with compute (#15512) 2026-01-19 10:43:17 +08:00
Ke Bao
f3a7c7dcd9 Move radix cache related tests (#17295) 2026-01-18 17:47:32 +08:00
Ke Bao
1fe0c82f67 Add kl test for swa radix cache (#17281) 2026-01-18 16:19:57 +08:00
Zehuan Li
d2c863878c [DLLM] Implement initial dynamic batching for diffusion LLM (#14883) 2026-01-17 16:48:15 +08:00
Yi Zhang
737a1183d6 [BUGFIX] fix radix cache memory consumption to avoid OOM (#17191) 
Co-authored-by: Liangsheng Yin <lsyincs@gmail.com>
 2026-01-17 16:47:37 +08:00
StonyPort
3355b6e21b feat: add request queued timeout (#17143) 
Co-authored-by: qiuxuan.lzw <qiuxuan.lzw@alibaba-inc.com>
Co-authored-by: Xiaoyu Zhang <35585791+BBuf@users.noreply.github.com>
 2026-01-16 17:55:09 +08:00
YC Tseng
968c4f55b1 [AMD] Enable DeepseekV3.2 test for AMD CI (#16934) 2026-01-15 21:58:46 -08:00
Lianmin Zheng
e7dc85c50b Fix grammar sync across TP ranks (#17100) 
Co-authored-by: Liangsheng Yin <lsyincs@gmail.com>
 2026-01-15 18:38:01 -08:00
Qiaolin Yu
e3a95077bc Add dpsk-r1-fp4 in nightly perf ci (#16882) 2026-01-15 16:13:35 -08:00
Alison Shao
146b5fcc84 [CI] Reorganize stage-b 1-GPU tests for 5090 compatibility (#16826) 2026-01-15 15:23:35 -08:00
Douglas Yang
655d2c7c2a fix: adding matrix partitioning for h200 and b200 nightly tests (#17091) 2026-01-15 11:23:19 -08:00
Bingxu Chen
98096b5e02 [AMD CI] migrate and re-enable CI tests to new CI registry (#16949) 
Co-authored-by: yctseng0211 <yctseng@amd.com>
 2026-01-14 21:25:25 -08:00
Douglas Yang
aa2b4f7661 fix: renaming test file and job names + skip blocking llama4 nightly (#16971) 2026-01-14 09:57:59 -08:00
shuwenn
de94d793ad feat: support qwen3(-VL) rerank scoring&chat template (#16403) 
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
 2026-01-15 00:45:46 +08:00
Netanel Haber
e75299a111 Fix issues/16714: Revert comment out of tl.debug_barrier() in causal_conv1d_triton (#16899) 
Co-authored-by: Yi Zhang <1109276519@qq.com>
 2026-01-14 17:26:48 +08:00
Michael
b025cff441 [AMD] Add AMD CI registration (1-gpu unit test) to nightly CI. (#16941) 2026-01-13 23:41:45 -08:00
Liangsheng Yin
e2c8a50b38 fix grammar timeout sync across tp ranks. (#16898) 2026-01-14 10:26:31 +08:00
Alison Shao
b880607108 Add 5090 dry run stage to PR test workflow (#17022) 2026-01-13 14:12:33 -08:00
YC Tseng
b1ee75ae7b [AMD] CI - enable test case for amd ci : triton_attention_kernels , torch_compile_moe (#16559) 2026-01-12 00:06:31 -08:00
Liangsheng Yin
934ae89abe Tiny fix typo minxin -> mixin (#16908) 2026-01-12 00:36:45 +08:00
Baizhou Zhang
8b5d426340 [CI]Move fa4 e2e test to 4-gpu-b200 runner (#16889) 2026-01-11 15:53:38 +08:00
Alison Shao
cc25f9df50 Update est_time for stage-b-test-small-1-gpu tests (#16835) 2026-01-11 12:03:43 +08:00
Leoyzen
cf14feba4d Fix parallel tool call parsing bug when tool parameters contain arrays (#16345) 2026-01-10 19:31:38 -08:00
Liangsheng Yin
78c41758ad [hot fix ci] Hot fix for the unregistered. (#16877) 2026-01-11 01:24:32 +08:00
fzyzcjy
dae6a4092a Tiny add scheduler status logging (#16872) 2026-01-10 20:12:24 +08:00
fzyzcjy
641830c1c2 Tiny extract file logging utils (#16870) 2026-01-10 20:02:37 +08:00
lg(x)
3a8b44fe89 Update LoRA Weights via Tensor (#16226) 
Co-authored-by: PopSoda2002 <zhouhp.me@gmail.com>
 2026-01-10 17:36:43 +08:00
Liangsheng Yin
3c358736d1 Enhance test for dp-attention + constrained decoding. (#16849) 2026-01-10 16:49:10 +08:00
Glen Liu
6327dff242 enhance LoRA tests and fix base model LoRA eviction in Scheduler (#16333) 2026-01-10 16:49:00 +08:00
Yuan Luo
ad20127359 [CI] Remove duplicate code in test_mamba_ut (#16854) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-10 16:16:56 +08:00
fzyzcjy
c89949bbaf Tiny let soft watchdog cover initialization phase (#16853) 2026-01-10 13:20:08 +08:00
fzyzcjy
32a569fb77 Tiny add CPU resource monitoring for overload diagnosis (#16852) 2026-01-10 12:48:18 +08:00
fzyzcjy
3ed3b7ef7c Tiny add routing key distribution metrics (#16847) 2026-01-10 12:06:40 +08:00
Liangsheng Yin
e6d40bff81 Revert "feat: reduce constrained-decoding overhead in TP" (#16845) 2026-01-10 11:39:38 +08:00
fzyzcjy
1f0ea4f958 Add routing key based schedule policy (#16840) 2026-01-10 10:16:23 +08:00
Alison Shao
ef35d8fe4e Migrate VLM tests and remove unit-test-backend-1-gpu job (#16679) 2026-01-09 15:24:26 -08:00
Yuan Luo
08636f72b5 [Fix CI] Fix test_mamba_unittest.py (#16810) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-01-09 15:03:47 -08:00
Liangsheng Yin
7066711529 [ci hot fix] fix global server args init for mamba ut (#16821) 2026-01-10 02:03:32 +08:00
Leoyzen
8ef5b90528 Fix GLM-4.7 MoE Detector complex JSON Schema type parsing (#15753) 2026-01-10 01:21:10 +08:00
Raayan Dhar
76b3c698d6 feat: reduce constrained-decoding overhead in TP (#13947) 
Signed-off-by: Raayan Dhar raayan.dhar@gmail.com <raayan.dhar@gmail.com>
Signed-off-by: raayandhar <raayan.dhar@gmail.com>
 2026-01-10 00:38:32 +08:00
Alison Shao
e46f79431b Fix external_models import path and migrate model loading tests (#16458) 2026-01-08 23:43:49 -08:00
Michael
fcec35dc4a [AMD] Add MI35x nightly CI tests (#16588) 
Co-authored-by: michaelzhang-ai <michaelzhang-ai@users.noreply.github.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
 2026-01-08 19:29:15 -08:00
Alison Shao
a979927727 Skip causal_conv1d test with padded batches due to Triton kernel bug (#16715) 2026-01-08 15:13:13 -08:00
YC Tseng
4e999404c3 [AMD] Fix CI - unit-test-backend-1-gpu-amd-mi35x and unit-test-backend-2-gpu-amd, stage-b-test-small-1-gpu-amd (#16675) 
Co-authored-by: Bingxu Chen <bingxche@amd.com>
 2026-01-08 10:16:27 -08:00
fzyzcjy
b6e8a0d851 Add file size hints in bitwise model file verifier (#16735) 2026-01-08 22:28:52 +08:00
fzyzcjy
83abecd0c2 Support pre-generating and using expected checksums (#16730) 2026-01-08 20:26:13 +08:00
fzyzcjy
d54f0a10b4 Support bitwise weight checksum verifier (#16729) 2026-01-08 20:19:25 +08:00
Bingxu Chen
f9c0426692 [AMD CI] re-enable testcases missed when migrating ci test files (#16535) 
Co-authored-by: michael-amd <michael.zhang@amd.com>
Co-authored-by: yctseng0211 <yctseng@amd.com>
 2026-01-07 22:43:48 -08:00