Lianmin Zheng
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c7d57d5bb3
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Fix CI and style (#12658)
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2025-11-05 15:08:15 -08:00 |
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Kaixi Hou
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141278048e
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[NVIDIA] Fix unit test of MoE and add it to nightly ci (#12709)
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2025-11-05 14:33:18 -08:00 |
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Glen Liu
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cbf23dbbfa
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[Feature] add --lora-request-distribution arg to bench_serving.py and support skewed and distinct workloads (#12175)
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2025-11-04 21:41:40 -08:00 |
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Kaixi Hou
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0711d1509b
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[NVIDIA] Fix cutedsl backend of MoE (#12353)
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2025-11-04 18:54:55 -08:00 |
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Liangsheng Yin
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aa797d013d
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[Test] Merge all constrained decoding tests. (#12633)
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2025-11-05 00:43:06 +08:00 |
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akhilg-nv
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e607850fcf
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Enable mixed type LayerNorm kernel for NSA indexer (#12044)
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2025-11-03 16:50:41 -08:00 |
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Jonah Bernard
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6ef23b9833
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[Test] Add parameters to SRTRunner (#12227)
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2025-11-03 11:20:56 -08:00 |
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Ho-Ren (Jack) Chuang
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76196b3cbf
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feat: Add FP4 (E2M1) KV Cache Support with Quantization Utilities for MLA (#10078)
Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
Co-authored-by: Yichen Wang <yichen.wang@bytedance.com>
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2025-11-01 22:24:58 -07:00 |
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Johnsonms
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6f858930c8
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[Bug] test_flashattn_mla_backend errors in Hopper #12487 (#12488)
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2025-11-01 18:28:06 -07:00 |
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Liangsheng Yin
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300b4c212e
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[CI] fix possible port conflicts. (#12452)
Co-authored-by: Lianmin Zheng <15100009+merrymercy@users.noreply.github.com>
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2025-10-31 17:20:20 +08:00 |
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Liangsheng Yin
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73dfd2dfb1
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[Test] Enhance radix cache test for spec cases (#12394)
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2025-10-30 18:46:28 +08:00 |
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Kangyan-Zhou
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2b71531a70
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Allow benchmarking tool to handle empty response (#12174)
Co-authored-by: Claude <noreply@anthropic.com>
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2025-10-29 20:26:23 -07:00 |
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Rain H
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750940ae36
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Eagle3 DP attention for Qwen3 MoE (#12002)
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2025-10-29 20:25:17 +08:00 |
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Lifu Huang
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ce832d7034
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Add env var to control custom Triton kernel cache and set CSGMV as default backend. (#12176)
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2025-10-27 17:49:32 -07:00 |
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satyamk7054
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9fc3e8aac7
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Add support for Matryoshka embeddings (#126) (#11142)
Co-authored-by: Satyam Kumar <satyamk@linkedin.com>
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2025-10-28 02:49:36 +08:00 |
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Weiwei
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caa4819bfc
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Add support for AutoRound quantized models (#10153)
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2025-10-27 18:17:29 +08:00 |
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Lianmin Zheng
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ea13cb1452
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[Auto Sync] Update test_deterministic.py, test_deterministi... (20251024) (#12083)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Stefan He <hebiaobuaa@gmail.com>
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2025-10-24 22:28:01 -07:00 |
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fzyzcjy
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d7056c5236
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Enhance tests in deterministic kernels (#12070)
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2025-10-25 08:53:22 +08:00 |
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fzyzcjy
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2342605ef0
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Tiny cleanup send_single (#12056)
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2025-10-23 23:53:42 -07:00 |
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Mick
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770529a731
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model: support deepseek-ocr (#11891)
Co-authored-by: yhyang201 <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: yhyang201 <yhyang201@gmail.com>
Co-authored-by: Shi Shuai <126407087+shuaills@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
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2025-10-24 03:15:17 +08:00 |
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Lianmin Zheng
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ab07cd3e5a
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[Auto Sync] Update test_deterministic_utils.py (20251023) (#12022)
Co-authored-by: Stefan He <hebiaobuaa@gmail.com>
|
2025-10-23 11:20:45 -07:00 |
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yinghui
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c23eda8589
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Fix incorrect KV indices creation when page_size=32 in TRTLLM MLA backend (#11985)
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2025-10-22 22:44:45 -07:00 |
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Liangsheng Yin
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9d61205dac
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[lint] improve ruff check (#11922)
Co-authored-by: Xiaoyu Zhang <35585791+BBuf@users.noreply.github.com>
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2025-10-22 11:32:50 +08:00 |
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Qiaolin Yu
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d9a20fd28a
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Use trtllm_mla decode kernel for draft extend in speculative decoding (#11664)
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2025-10-21 11:42:09 +08:00 |
|
Johnny
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252dc4e112
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[NVIDIA] FA3/FA4 Fix (#11606)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
|
2025-10-19 17:10:10 -07:00 |
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Stefan He
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4fff1ec1d9
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Deterministic Mode: Add 1-stage triton kernel for prefill (#11147)
Co-authored-by: Minglei Zhu <mingleizhu1122@gmail.com>
Co-authored-by: Binyao Jiang <bijiang@linkedin.com>
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2025-10-20 01:47:36 +08:00 |
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Liangsheng Yin
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7a020e0f3b
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[Test] Add basic matched stop for beta eagle (#11833)
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2025-10-20 01:17:00 +08:00 |
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Liangsheng Yin
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b288f4f440
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Improve send_sone script (#11817)
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2025-10-19 11:28:16 +08:00 |
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Minglei Zhu
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13219e1e48
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completely remove mixed mode deterministic test as prefix mode could cover it (#11783)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
|
2025-10-17 17:46:03 -07:00 |
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Chang Su
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627974405d
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[Lint] Add python/sglang to ruff F401 checks and remove unused imports in files (#11685)
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2025-10-17 16:49:46 -07:00 |
|
Lianmin Zheng
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b9a54e0968
|
[minor] sync code on python/sglang/test/test_deterministic.py and improve ci tests (#11777)
Co-authored-by: Stefan He <hebiaobuaa@gmail.com>
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
|
2025-10-17 14:25:22 -07:00 |
|
Yineng Zhang
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da681f35d3
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Revert "Set csgmv as default lora backend. (#11488)" (#11735)
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2025-10-17 12:01:36 -05:00 |
|
Baizhou Zhang
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b0d1d717e1
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Revert "make radix cache deterministic" (#11728)
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2025-10-16 14:36:15 -07:00 |
|
Hank Han
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0dd6cf16ba
|
[ci]use H20 to run disaggregation test (#11543)
|
2025-10-16 11:42:42 -07:00 |
|
Lifu Huang
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b0d20cdec7
|
Set csgmv as default lora backend. (#11488)
|
2025-10-15 23:53:24 -05:00 |
|
YanbingJiang
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cbac499750
|
Split test_intel_amx_attention_backend.py to pass CI of timeout (#11370)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2025-10-15 19:22:32 -07:00 |
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Lianmin Zheng
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cd7e1bd591
|
Sync code and test CI; rename some env vars (#11686)
|
2025-10-15 18:37:03 -07:00 |
|
DiweiSun
|
4c03dbaaef
|
[CI][XPU]enable sglang CI on Intel XPU (#9493)
Co-authored-by: huaiyuzh <huaiyu.zheng@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
|
2025-10-15 17:13:19 -07:00 |
|
Stefan He
|
6b143d62a2
|
Clean up some Qwen3-Next and deterministic code (#11585)
|
2025-10-15 15:19:37 +08:00 |
|
Alex Chi Z
|
dc965db0e0
|
make radix cache deterministic (#10721)
Signed-off-by: Alex Chi Z <iskyzh@gmail.com>
|
2025-10-14 21:01:52 +08:00 |
|
Chenxi Li
|
28f80b1244
|
Implement LRU eviction policy for LoRA adapters (#11041)
|
2025-10-13 20:18:25 -07:00 |
|
Lianmin Zheng
|
2ac46e94ef
|
Sync changes on io_struct.py and deterministic ops (#11498)
|
2025-10-12 16:03:10 -07:00 |
|
Binyao Jiang
|
0aa65f94f1
|
[Fix] Improve longbench prompt and other logics (#11474)
|
2025-10-12 15:04:28 -07:00 |
|
Lianmin Zheng
|
548a57b1f3
|
Fix port conflicts in CI (#11497)
|
2025-10-12 06:46:36 -07:00 |
|
Kai-Hsun Chen
|
1103dc6204
|
[chore][2/N] Avoid using default mutable parameters (#11479)
Signed-off-by: Kai-Hsun Chen <khchen@x.ai>
|
2025-10-12 20:34:04 +08:00 |
|
Liangsheng Yin
|
c882b5ae75
|
[CI] improve disaggregation CI. (#11264)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
|
2025-10-08 21:40:56 +08:00 |
|
Cheng Wan
|
3c06b673af
|
[8/N] MoE Refactor: deprecate EPMoE (#11211)
|
2025-10-07 21:51:41 -07:00 |
|
Mick
|
64d1505c0a
|
ci: unify the model launch method of nightly ci (#11230)
|
2025-10-07 18:13:14 -07:00 |
|
Liangsheng Yin
|
1519a89cfd
|
Remove overlap thread (#11210)
Co-authored-by: Lianmin Zheng <15100009+merrymercy@users.noreply.github.com>
Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com>
|
2025-10-07 20:12:12 +08:00 |
|
Al-Ekram Elahee Hridoy
|
533e58a15d
|
Feature/longbench v2 evaluation utils (#10949)
|
2025-10-07 14:17:31 +08:00 |
|