[JIT sgl-kernel] Jit support per tensor quant (#15709)
This commit is contained in:
135
python/sglang/jit_kernel/benchmark/bench_per_tensor_quant_fp8.py
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135
python/sglang/jit_kernel/benchmark/bench_per_tensor_quant_fp8.py
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@@ -0,0 +1,135 @@
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import itertools
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import os
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from typing import Optional, Tuple
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import torch
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import triton
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import triton.testing
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from sglang.jit_kernel.per_tensor_quant_fp8 import per_tensor_quant_fp8
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try:
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from vllm import _custom_ops as ops
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VLLM_AVAILABLE = True
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except ImportError:
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ops = None
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VLLM_AVAILABLE = False
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try:
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from sglang.srt.utils import is_hip
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_is_hip = is_hip()
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except ImportError:
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_is_hip = False
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IS_CI = (
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os.getenv("CI", "false").lower() == "true"
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or os.getenv("GITHUB_ACTIONS", "false").lower() == "true"
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)
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fp8_type_ = torch.float8_e4m3fnuz if _is_hip else torch.float8_e4m3fn
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def vllm_scaled_fp8_quant(
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input: torch.Tensor,
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scale: Optional[torch.Tensor] = None,
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) -> Tuple[torch.Tensor, torch.Tensor]:
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if not VLLM_AVAILABLE:
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return sglang_scaled_fp8_quant(input, scale)
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return ops.scaled_fp8_quant(input, scale)
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def sglang_scaled_fp8_quant(
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input: torch.Tensor,
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scale: Optional[torch.Tensor] = None,
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) -> Tuple[torch.Tensor, torch.Tensor]:
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fp8_type_: torch.dtype = torch.float8_e4m3fn
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output = torch.empty_like(input, device=input.device, dtype=fp8_type_)
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is_static = True
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if scale is None:
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scale = torch.zeros(1, device=input.device, dtype=torch.float32)
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is_static = False
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per_tensor_quant_fp8(input, output, scale, is_static)
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return output, scale
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def calculate_diff(batch_size: int, seq_len: int):
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device = torch.device("cuda")
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x = torch.rand((batch_size, seq_len), dtype=torch.float16, device=device)
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if not VLLM_AVAILABLE:
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print("vLLM not available, skipping comparison")
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return
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vllm_out, vllm_scale = vllm_scaled_fp8_quant(x)
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sglang_out, sglang_scale = sglang_scaled_fp8_quant(x)
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scale_diff = torch.abs(vllm_scale - sglang_scale).item()
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output_diff = torch.abs(vllm_out.float() - sglang_out.float()).mean().item()
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if torch.allclose(
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vllm_out.to(torch.float32), sglang_out.to(torch.float32), rtol=1e-3, atol=1e-5
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) and torch.allclose(vllm_scale, sglang_scale, rtol=1e-3, atol=1e-5):
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print("All implementations match")
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else:
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print("Implementations differ")
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if IS_CI:
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batch_size_range = [16]
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seq_len_range = [64]
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else:
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batch_size_range = [16, 32, 64, 128]
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seq_len_range = [64, 128, 256, 512, 1024, 2048]
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configs = list(itertools.product(batch_size_range, seq_len_range))
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if VLLM_AVAILABLE:
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line_vals = ["vllm", "sglang"]
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line_names = ["VLLM", "SGL Kernel"]
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styles = [("blue", "-"), ("green", "-")]
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else:
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line_vals = ["sglang"]
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line_names = ["SGL Kernel"]
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styles = [("green", "-")]
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@triton.testing.perf_report(
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triton.testing.Benchmark(
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x_names=["batch_size", "seq_len"],
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x_vals=configs,
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line_arg="provider",
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line_vals=line_vals,
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line_names=line_names,
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styles=styles,
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ylabel="us",
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plot_name="per-tensor-quant-fp8-performance",
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args={},
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)
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)
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def benchmark(batch_size, seq_len, provider):
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dtype = torch.float16
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device = torch.device("cuda")
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x = torch.randn(batch_size * seq_len, 4096, device=device, dtype=dtype)
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quantiles = [0.5, 0.2, 0.8]
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if provider == "vllm":
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fn = lambda: vllm_scaled_fp8_quant(x.clone())
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elif provider == "sglang":
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fn = lambda: sglang_scaled_fp8_quant(x.clone())
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else:
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raise ValueError(f"Unknown provider: {provider}")
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ms, min_ms, max_ms = triton.testing.do_bench_cudagraph(fn, quantiles=quantiles)
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return 1000 * ms, 1000 * max_ms, 1000 * min_ms
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if __name__ == "__main__":
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calculate_diff(batch_size=4, seq_len=4096)
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benchmark.run(print_data=True)
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@@ -53,8 +53,6 @@ void add_constant(tvm::ffi::TensorView dst, tvm::ffi::TensorView src) {
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static_cast<int32_t*>(dst.data_ptr()),
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static_cast<int32_t*>(src.data_ptr()),
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num_elements);
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// You can also manually check the last CUDA error code via:
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// RuntimeDeviceCheck();
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}
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} // namespace
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160
python/sglang/jit_kernel/csrc/gemm/per_tensor_quant_fp8.cuh
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160
python/sglang/jit_kernel/csrc/gemm/per_tensor_quant_fp8.cuh
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@@ -0,0 +1,160 @@
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#include <sgl_kernel/fp8_utils.cuh>
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#include <sgl_kernel/tensor.h>
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#include <sgl_kernel/utils.cuh>
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#include <sgl_kernel/utils.h>
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#include <cstddef>
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#include <cstdint>
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#include <cub/block/block_reduce.cuh>
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#include <flashinfer/vec_dtypes.cuh>
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namespace {
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using device::atomicMaxFloat;
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using device::blockReduceMax;
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using device::FP8_E4M3_MAX;
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template <typename T>
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__global__ void
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per_tensor_absmax_kernel(const T* __restrict__ input, float* __restrict__ output_s, const int64_t num_elements) {
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float max_value = 0.0f;
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unsigned int tid = threadIdx.x;
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unsigned int gid = blockIdx.x * blockDim.x + threadIdx.x;
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const int grid_size = blockDim.x * gridDim.x;
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constexpr uint32_t vec_size = 16 / sizeof(T);
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using vec_t = flashinfer::vec_t<T, vec_size>;
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const int32_t num_vec_elems = num_elements / vec_size;
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for (int32_t i = gid; i < num_vec_elems; i += grid_size) {
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vec_t input_vec;
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input_vec.cast_load(input + i * vec_size);
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#pragma unroll
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for (uint32_t j = 0; j < vec_size; ++j) {
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float val = static_cast<float>(input_vec[j]);
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max_value = fmaxf(max_value, fabsf(val));
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}
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}
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const int32_t remaining_start = num_vec_elems * vec_size;
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for (int32_t idx = remaining_start + gid; idx < num_elements; idx += grid_size) {
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float val = static_cast<float>(input[idx]);
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max_value = fmaxf(max_value, fabsf(val));
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}
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max_value = blockReduceMax(max_value);
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if (tid == 0) {
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atomicMaxFloat(output_s, max_value / FP8_E4M3_MAX);
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}
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}
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template <typename T, typename DST_DTYPE>
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__global__ void per_tensor_quant_fp8_kernel(
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const T* __restrict__ input,
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DST_DTYPE* __restrict__ output,
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const float* __restrict__ scale,
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const int64_t num_elements) {
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const int gid = blockIdx.x * blockDim.x + threadIdx.x;
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const int grid_size = blockDim.x * gridDim.x;
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const float scale_val = 1.0f / (*scale);
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const uint32_t VEC_SIZE = 16;
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using vec_t = flashinfer::vec_t<T, VEC_SIZE>;
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const int32_t num_vec_elems = num_elements / VEC_SIZE;
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for (int32_t i = gid; i < num_vec_elems; i += grid_size) {
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vec_t input_vec;
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input_vec.cast_load(input + i * VEC_SIZE);
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DST_DTYPE output_arr[VEC_SIZE];
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#pragma unroll
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for (uint32_t j = 0; j < VEC_SIZE; ++j) {
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float val = fmax(fmin(static_cast<float>(input_vec[j]) * scale_val, FP8_E4M3_MAX), -FP8_E4M3_MAX);
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#if !defined(USE_ROCM) || defined(HIP_FP8_TYPE_E4M3)
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output_arr[j] = static_cast<DST_DTYPE>(val);
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#else
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output_arr[j] = c10::Float8_e4m3fnuz(
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__hip_cvt_float_to_fp8(val, fp8::fp8_type::__default_saturation, fp8::fp8_type::__default_interpret),
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c10::Float8_e4m3fnuz::from_bits());
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#endif
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}
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*(uint4*)(output + i * VEC_SIZE) = *(uint4*)output_arr;
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}
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const int32_t remaining_start = num_vec_elems * VEC_SIZE;
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for (int32_t idx = remaining_start + gid; idx < num_elements; idx += grid_size) {
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float val = fmax(-FP8_E4M3_MAX, fmin(static_cast<float>(input[idx]) * scale_val, FP8_E4M3_MAX));
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#if !defined(USE_ROCM) || defined(HIP_FP8_TYPE_E4M3)
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output[idx] = static_cast<DST_DTYPE>(val);
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#else
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output[idx] = c10::Float8_e4m3fnuz(
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__hip_cvt_float_to_fp8(val, fp8::fp8_type::__default_saturation, fp8::fp8_type::__default_interpret),
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c10::Float8_e4m3fnuz::from_bits());
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#endif
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}
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}
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constexpr size_t kBlockSize = 256;
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template <bool kIsStatic>
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void per_tensor_quant_fp8(tvm::ffi::TensorView input, tvm::ffi::TensorView output_q, tvm::ffi::TensorView output_s) {
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using namespace host;
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SymbolicSize num_tokens = {"num_tokens"};
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SymbolicSize hidden_dim = {"hidden_dim"};
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SymbolicDevice device_;
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SymbolicDType input_dtype;
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TensorMatcher({num_tokens, hidden_dim}) //
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.with_dtype<float, __half, __nv_bfloat16>(input_dtype)
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.with_device<kDLCUDA>(device_)
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.verify(input);
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TensorMatcher({num_tokens, hidden_dim}) //
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.with_dtype<__nv_fp8_e4m3>()
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.with_device<kDLCUDA>(device_)
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.verify(output_q);
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TensorMatcher({1}) //
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.with_dtype<float>()
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.with_device<kDLCUDA>(device_)
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.verify(output_s);
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const size_t total_elements = num_tokens.unwrap() * hidden_dim.unwrap();
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const size_t num_blocks = std::min((total_elements + kBlockSize - 1) / kBlockSize, size_t(1024));
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const DLDevice device = device_.unwrap();
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RuntimeCheck(total_elements > 0, "Input tensor must be non-empty");
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auto launch_kernels = [&]<typename T>() {
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if constexpr (!kIsStatic) {
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LaunchKernel(num_blocks, kBlockSize, device)(
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per_tensor_absmax_kernel<T>,
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static_cast<const T*>(input.data_ptr()),
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static_cast<float*>(output_s.data_ptr()),
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static_cast<int64_t>(total_elements));
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}
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LaunchKernel(num_blocks, kBlockSize, device)(
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per_tensor_quant_fp8_kernel<T, __nv_fp8_e4m3>,
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static_cast<const T*>(input.data_ptr()),
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static_cast<__nv_fp8_e4m3*>(output_q.data_ptr()),
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static_cast<const float*>(output_s.data_ptr()),
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static_cast<int64_t>(total_elements));
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};
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const DLDataType dtype = input_dtype.unwrap();
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if (dtype.code == kDLFloat && dtype.bits == 32) {
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launch_kernels.template operator()<float>();
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} else if (dtype.code == kDLBfloat && dtype.bits == 16) {
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launch_kernels.template operator()<__nv_bfloat16>();
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} else if (dtype.code == kDLFloat && dtype.bits == 16) {
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launch_kernels.template operator()<__half>();
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}
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}
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} // namespace
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13
python/sglang/jit_kernel/include/sgl_kernel/fp8_utils.cuh
Normal file
13
python/sglang/jit_kernel/include/sgl_kernel/fp8_utils.cuh
Normal file
@@ -0,0 +1,13 @@
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#pragma once
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#ifdef __CUDACC__
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#include <cuda_fp8.h>
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#endif
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namespace device {
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inline constexpr float FP8_E4M3_MAX = 448.0f;
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} // namespace device
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@@ -23,6 +23,7 @@
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#ifdef __CUDACC__
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#include <cuda_fp8.h>
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#endif
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namespace host {
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@@ -65,6 +66,10 @@ template <>
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struct dtype_trait<__nv_bfloat16> {
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inline static constexpr DLDataType value = {.code = DLDataTypeCode::kDLBfloat, .bits = 16, .lanes = 1};
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};
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template <>
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struct dtype_trait<__nv_fp8_e4m3> {
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inline static constexpr DLDataType value = {.code = DLDataTypeCode::kDLFloat8_e4m3fn, .bits = 8, .lanes = 1};
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};
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#endif
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template <DLDeviceType Code>
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@@ -12,6 +12,49 @@
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namespace device {
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inline constexpr auto kWarpThreads = 32u;
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inline constexpr auto kFullMask = 0xffffffffu;
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__device__ __forceinline__ float atomicMaxFloat(float* addr, float value) {
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#ifndef USE_ROCM
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float old;
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old = (value >= 0) ? __int_as_float(atomicMax((int*)addr, __float_as_int(value)))
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: __uint_as_float(atomicMin((unsigned int*)addr, __float_as_uint(value)));
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return old;
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#else
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int* addr_as_i = (int*)addr;
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int old = *addr_as_i, assumed;
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do {
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assumed = old;
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old = atomicCAS(addr_as_i, assumed, __float_as_int(fmaxf(value, __int_as_float(assumed))));
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} while (assumed != old);
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return __int_as_float(old);
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#endif
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}
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__device__ __forceinline__ float warpReduceMax(float value) {
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value = fmaxf(value, __shfl_xor_sync(kFullMask, value, 16));
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value = fmaxf(value, __shfl_xor_sync(kFullMask, value, 8));
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value = fmaxf(value, __shfl_xor_sync(kFullMask, value, 4));
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value = fmaxf(value, __shfl_xor_sync(kFullMask, value, 2));
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value = fmaxf(value, __shfl_xor_sync(kFullMask, value, 1));
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return value;
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}
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__device__ __forceinline__ float blockReduceMax(float value) {
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static __shared__ float warpLevelMaxs[kWarpThreads];
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const int laneId = threadIdx.x % kWarpThreads;
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const int warpId = threadIdx.x / kWarpThreads;
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value = warpReduceMax(value);
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if (laneId == 0) warpLevelMaxs[warpId] = value;
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__syncthreads();
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value = (threadIdx.x < blockDim.x / kWarpThreads) ? warpLevelMaxs[laneId] : 0;
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if (warpId == 0) value = warpReduceMax(value);
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return value;
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}
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namespace pointer {
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@@ -2,6 +2,9 @@
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// ref: https://forums.developer.nvidia.com/t/c-20s-source-location-compilation-error-when-using-nvcc-12-1/258026/3
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#ifdef __CUDACC__
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#include <cuda.h>
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#if CUDA_VERSION <= 12010
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#pragma push_macro("__cpp_consteval")
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#pragma push_macro("_NODISCARD")
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#pragma push_macro("__builtin_LINE")
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@@ -23,7 +26,10 @@
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#undef consteval
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#pragma pop_macro("__cpp_consteval")
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#pragma pop_macro("_NODISCARD")
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#else
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#else // __CUDACC__ && CUDA_VERSION > 12010
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#include <source_location>
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#endif
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#else // no __CUDACC__
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#include <source_location>
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#endif
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@@ -33,7 +39,6 @@
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#include <cstddef>
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#include <ostream>
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#include <ranges>
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#include <source_location>
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#include <sstream>
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#include <utility>
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51
python/sglang/jit_kernel/per_tensor_quant_fp8.py
Normal file
51
python/sglang/jit_kernel/per_tensor_quant_fp8.py
Normal file
@@ -0,0 +1,51 @@
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from __future__ import annotations
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import functools
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import os
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from typing import TYPE_CHECKING
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||||
import flashinfer
|
||||
import torch
|
||||
from torch.utils.cpp_extension import CUDA_HOME
|
||||
|
||||
from sglang.jit_kernel.utils import load_jit, make_cpp_args
|
||||
|
||||
if TYPE_CHECKING:
|
||||
from tvm_ffi.module import Module
|
||||
|
||||
|
||||
@functools.cache
|
||||
def _jit_per_tensor_quant_fp8_module(is_static: bool) -> Module:
|
||||
args = make_cpp_args(is_static)
|
||||
|
||||
flashinfer_include = os.path.join(
|
||||
os.path.dirname(flashinfer.__file__), "data", "include"
|
||||
)
|
||||
cub_include = os.path.join(CUDA_HOME, "include")
|
||||
|
||||
return load_jit(
|
||||
"per_tensor_quant_fp8",
|
||||
*args,
|
||||
cuda_files=["gemm/per_tensor_quant_fp8.cuh"],
|
||||
cuda_wrappers=[("per_tensor_quant_fp8", f"per_tensor_quant_fp8<{args}>")],
|
||||
extra_include_paths=[flashinfer_include, cub_include],
|
||||
)
|
||||
|
||||
|
||||
def per_tensor_quant_fp8(
|
||||
input: torch.Tensor,
|
||||
output_q: torch.Tensor,
|
||||
output_s: torch.Tensor,
|
||||
is_static: bool = False,
|
||||
) -> None:
|
||||
"""
|
||||
Per-tensor quantization to FP8 format.
|
||||
|
||||
Args:
|
||||
input: Input tensor to quantize (float, half, or bfloat16)
|
||||
output_q: Output quantized tensor (fp8_e4m3)
|
||||
output_s: Output scale tensor (float scalar)
|
||||
is_static: If True, assumes scale is pre-computed and skips absmax computation
|
||||
"""
|
||||
module = _jit_per_tensor_quant_fp8_module(is_static)
|
||||
module.per_tensor_quant_fp8(input, output_q, output_s)
|
||||
70
python/sglang/jit_kernel/tests/test_per_tensor_quant_fp8.py
Normal file
70
python/sglang/jit_kernel/tests/test_per_tensor_quant_fp8.py
Normal file
@@ -0,0 +1,70 @@
|
||||
import itertools
|
||||
from typing import Optional, Tuple
|
||||
|
||||
import pytest
|
||||
import torch
|
||||
|
||||
from sglang.jit_kernel.per_tensor_quant_fp8 import per_tensor_quant_fp8
|
||||
|
||||
try:
|
||||
from sglang.srt.utils import is_hip
|
||||
|
||||
_is_hip = is_hip()
|
||||
except ImportError:
|
||||
_is_hip = False
|
||||
|
||||
fp8_type_ = torch.float8_e4m3fnuz if _is_hip else torch.float8_e4m3fn
|
||||
|
||||
|
||||
def sglang_scaled_fp8_quant(
|
||||
input: torch.Tensor,
|
||||
scale: Optional[torch.Tensor] = None,
|
||||
) -> Tuple[torch.Tensor, torch.Tensor]:
|
||||
fp8_type_: torch.dtype = torch.float8_e4m3fn
|
||||
output = torch.empty_like(input, device=input.device, dtype=fp8_type_)
|
||||
is_static = True
|
||||
if scale is None:
|
||||
scale = torch.zeros(1, device=input.device, dtype=torch.float32)
|
||||
is_static = False
|
||||
per_tensor_quant_fp8(input, output, scale, is_static)
|
||||
|
||||
return output, scale
|
||||
|
||||
|
||||
def torch_scaled_fp8_quant(tensor, inv_scale):
|
||||
finfo = torch.finfo(torch.float8_e4m3fn)
|
||||
scale = inv_scale.reciprocal()
|
||||
qweight = (tensor.to(torch.float32) * scale).clamp(min=finfo.min, max=finfo.max)
|
||||
qweight = qweight.to(torch.float8_e4m3fn)
|
||||
return qweight
|
||||
|
||||
|
||||
@pytest.mark.parametrize(
|
||||
"num_tokens,hidden_dim",
|
||||
list(itertools.product([128, 256, 512], [512, 2048, 4096])),
|
||||
)
|
||||
def test_per_tensor_quant_compare_implementations(
|
||||
num_tokens: int,
|
||||
hidden_dim: int,
|
||||
):
|
||||
device = torch.device("cuda")
|
||||
x = torch.rand((num_tokens, hidden_dim), dtype=torch.float16, device=device)
|
||||
|
||||
sglang_out, sglang_scale = sglang_scaled_fp8_quant(x)
|
||||
torch_out = torch_scaled_fp8_quant(x, sglang_scale)
|
||||
|
||||
torch.testing.assert_close(
|
||||
sglang_out.float(), torch_out.float(), rtol=1e-3, atol=1e-3
|
||||
)
|
||||
|
||||
scale = torch.rand(1, dtype=torch.float32, device=device)
|
||||
sglang_out, sglang_scale = sglang_scaled_fp8_quant(x, scale)
|
||||
torch_out = torch_scaled_fp8_quant(x, scale)
|
||||
|
||||
torch.testing.assert_close(
|
||||
sglang_out.float(), torch_out.float(), rtol=1e-3, atol=1e-3
|
||||
)
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
pytest.main([__file__])
|
||||
Reference in New Issue
Block a user