[AMD] Clean up vllm dependencies in moe_runner/triton.py (#11349)
Co-authored-by: HAI <hixiao@gmail.com>
This commit is contained in:
@@ -32,23 +32,25 @@ _is_hip = is_hip()
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_is_cuda = is_cuda()
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_is_cpu_amx_available = cpu_has_amx_support()
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_is_cpu = is_cpu()
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_use_aiter = bool(int(os.getenv("SGLANG_MOE_USE_AITER", "0")))
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_use_aiter = bool(int(os.getenv("SGLANG_USE_AITER", "0")))
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_MOE_PADDING_SIZE = 128 if bool(int(os.getenv("SGLANG_MOE_PADDING", "0"))) else 0
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if _is_cuda:
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if _is_cuda or _is_hip:
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from sgl_kernel import gelu_and_mul, silu_and_mul
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if _is_hip:
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if _use_aiter:
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try:
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from aiter import moe_sum
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except ImportError:
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raise ImportError(
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"aiter is required when SGLANG_USE_AITER is set to True"
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)
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else:
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from vllm import _custom_ops as vllm_ops # moe_sum
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elif _is_cpu and _is_cpu_amx_available:
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pass
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elif _is_hip:
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from vllm import _custom_ops as vllm_ops # gelu_and_mul, silu_and_mul
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if _use_aiter:
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try:
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from aiter import moe_sum
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except ImportError:
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raise ImportError("aiter is required when SGLANG_USE_AITER is set to True")
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if _is_cuda or _is_hip:
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from sgl_kernel import ( # noqa: F401
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@@ -206,7 +208,7 @@ class TritonRunnerCore(MoeRunnerCore):
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gemm1_alpha,
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gemm1_limit,
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)
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elif _is_cuda:
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elif _is_cuda or _is_hip:
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silu_and_mul(intermediate_cache1.view(-1, N), intermediate_cache2)
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else:
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vllm_ops.silu_and_mul(
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@@ -215,7 +217,7 @@ class TritonRunnerCore(MoeRunnerCore):
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elif activation == "gelu":
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assert gemm1_alpha is None, "gemm1_alpha is not supported for gelu"
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assert gemm1_limit is None, "gemm1_limit is not supported for gelu"
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if _is_cuda:
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if _is_cuda or _is_hip:
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gelu_and_mul(intermediate_cache1.view(-1, N), intermediate_cache2)
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else:
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vllm_ops.gelu_and_mul(
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