optimize per token group quant fp8 (#3490)
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@@ -29,6 +29,7 @@ from sgl_kernel.ops import (
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register_graph_buffers,
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rmsnorm,
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sampling_scaling_penalties,
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sgl_per_token_group_quant_fp8,
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silu_and_mul,
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top_k_renorm_prob,
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top_k_top_p_sampling_from_probs,
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@@ -65,4 +66,5 @@ __all__ = [
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"tree_speculative_sampling_target_only",
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"build_tree_kernel_efficient",
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"build_tree_kernel",
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"sgl_per_token_group_quant_fp8",
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]
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100
sgl-kernel/src/sgl-kernel/csrc/per_token_group_quant_fp8.cu
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100
sgl-kernel/src/sgl-kernel/csrc/per_token_group_quant_fp8.cu
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@@ -0,0 +1,100 @@
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#include <ATen/cuda/CUDAContext.h>
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#include <c10/util/Float8_e4m3fn.h>
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#include <cmath>
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#include "utils.h"
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using FP8_TYPE = c10::Float8_e4m3fn;
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__device__ __forceinline__ float WarpReduce(volatile float* smem, const int tid) {
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if (tid < 8) {
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smem[tid] = fmaxf(smem[tid], smem[tid + 8]);
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if (tid < 4) smem[tid] = fmaxf(smem[tid], smem[tid + 4]);
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if (tid < 2) smem[tid] = fmaxf(smem[tid], smem[tid + 2]);
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if (tid < 1) smem[tid] = fmaxf(smem[tid], smem[tid + 1]);
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}
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return smem[0];
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}
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template <typename T>
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__global__ void per_token_group_quant_fp8_kernel(const T* __restrict__ input, void* __restrict__ output_q,
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float* __restrict__ output_s, const int group_size,
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const int num_groups, const float eps, const float fp8_min,
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const float fp8_max) {
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const int groups_per_block = 16;
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const int block_group_id = blockIdx.x * groups_per_block;
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const int tid = threadIdx.x;
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const int local_group_id = tid / 16; // Each 16 threads handle one group
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const int local_tid = tid % 16; // Thread ID within the group
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__shared__ float s_absmax[16][17]; // Use 17 instead of 16 to avoid bank conflicts
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// Local maximum value for each thread
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float local_absmax = eps;
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// Ensure this block doesn't process out-of-bounds groups
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if (block_group_id + local_group_id < num_groups) {
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// Calculate input/output pointers for current group
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const T* group_input = input + (block_group_id + local_group_id) * group_size;
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FP8_TYPE* group_output = static_cast<FP8_TYPE*>(output_q) + (block_group_id + local_group_id) * group_size;
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float* scale_output = output_s + block_group_id + local_group_id;
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// Calculate local maximum absolute value
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for (int i = local_tid; i < group_size; i += 16) {
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float val = static_cast<float>(group_input[i]);
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float abs_val = fabsf(val);
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local_absmax = fmaxf(local_absmax, abs_val);
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}
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// Store in shared memory
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s_absmax[local_group_id][local_tid] = local_absmax;
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__syncthreads();
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// Perform reduction within each group
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if (local_tid < 8) {
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WarpReduce(&s_absmax[local_group_id][0], local_tid);
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}
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__syncthreads();
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// Get the maximum value for this group
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const float group_absmax = s_absmax[local_group_id][0];
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const float y_s = group_absmax / fp8_max;
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// Only the first thread in each group writes the scale
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if (local_tid == 0) {
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*scale_output = y_s;
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}
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// Quantize the data
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for (int i = local_tid; i < group_size; i += 16) {
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float val = static_cast<float>(group_input[i]);
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float q_val = fminf(fmaxf(val / y_s, fp8_min), fp8_max);
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group_output[i] = FP8_TYPE(q_val);
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}
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}
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}
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void sgl_per_token_group_quant_fp8(torch::Tensor input, torch::Tensor output_q, torch::Tensor output_s,
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int64_t group_size, double eps, double fp8_min, double fp8_max) {
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CHECK_INPUT(input);
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CHECK_INPUT(output_q);
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CHECK_INPUT(output_s);
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const int num_groups = input.numel() / group_size;
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CHECK_EQ(input.numel() % group_size, 0);
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// Each block processes 16 groups, adjust grid size accordingly
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dim3 grid((num_groups + 15) / 16);
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dim3 block(256); // Keep 256 threads, each 16 threads handle one group
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cudaStream_t stream = at::cuda::getCurrentCUDAStream();
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DISPATCH_PYTORCH_DTYPE_TO_CTYPE_FLOAT_FP16(input.scalar_type(), scalar_t, [&] {
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per_token_group_quant_fp8_kernel<scalar_t><<<grid, block, 0, stream>>>(
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static_cast<scalar_t*>(input.data_ptr()), output_q.data_ptr(), static_cast<float*>(output_s.data_ptr()),
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group_size, num_groups, (float)eps, (float)fp8_min, (float)fp8_max);
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return true;
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});
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}
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@@ -143,3 +143,7 @@ void build_tree_kernel_efficient(at::Tensor parent_list, at::Tensor selected_ind
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void build_tree_kernel(at::Tensor parent_list, at::Tensor selected_index, at::Tensor verified_seq_len,
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at::Tensor tree_mask, at::Tensor positions, at::Tensor retrive_index, int64_t topk,
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int64_t depth, int64_t draft_token_num);
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// sgl_per_token_group_quant_fp8
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void sgl_per_token_group_quant_fp8(at::Tensor input, at::Tensor output_q, at::Tensor output_s, int64_t group_size,
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double eps, double fp8_min, double fp8_max);
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@@ -579,3 +579,17 @@ def build_tree_kernel(
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depth,
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draft_token_num,
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)
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def sgl_per_token_group_quant_fp8(
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input: torch.Tensor,
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output_q: torch.Tensor,
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output_s: torch.Tensor,
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group_size: int,
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eps: float,
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fp8_min: float,
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fp8_max: float,
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) -> None:
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torch.ops.sgl_kernels.sgl_per_token_group_quant_fp8(
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input, output_q, output_s, group_size, eps, fp8_min, fp8_max
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)
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@@ -153,6 +153,12 @@ TORCH_LIBRARY_EXPAND(sgl_kernels, m) {
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"Tensor! tree_mask, Tensor! positions, Tensor! retrive_index, "
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"int topk, int depth, int draft_token_num) -> ()");
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m.impl("build_tree_kernel", torch::kCUDA, &build_tree_kernel);
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// per_token_group_quant_fp8
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m.def(
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"sgl_per_token_group_quant_fp8(Tensor input, Tensor output_q, Tensor output_s, int group_size,"
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" float eps, float fp8_min, float fp8_max) -> ()");
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m.impl("sgl_per_token_group_quant_fp8", torch::kCUDA, &sgl_per_token_group_quant_fp8);
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}
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REGISTER_EXTENSION(_kernels)
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