ci: unify PR test suite naming (#21187)

This commit is contained in:
Lianmin Zheng
2026-03-23 00:18:45 -07:00
committed by GitHub
parent 3d312643b9
commit 814202704b
283 changed files with 554 additions and 554 deletions
@@ -2,7 +2,7 @@
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=5, suite="stage-a-cpu-only")
register_cpu_ci(est_time=5, suite="stage-a-test-cpu")
import unittest
from unittest.mock import MagicMock
@@ -21,8 +21,8 @@ from sglang.srt.server_args import ServerArgs, set_global_server_args_for_schedu
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=9, suite="stage-b-test-small-1-gpu")
register_amd_ci(est_time=9, suite="stage-b-test-small-1-gpu-amd")
register_cuda_ci(est_time=9, suite="stage-b-test-1-gpu-small")
register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
class TestMamba(unittest.TestCase):
@@ -11,7 +11,7 @@ from sglang.srt.mem_cache.memory_pool_host import (
from sglang.srt.utils import is_cuda, is_hip, is_npu, is_xpu
from sglang.test.ci.ci_register import register_cuda_ci
register_cuda_ci(est_time=3, suite="stage-b-test-small-1-gpu")
register_cuda_ci(est_time=3, suite="stage-b-test-1-gpu-small")
class TestNSAHiCacheTransfer(unittest.TestCase):
@@ -13,7 +13,7 @@ from sglang.srt.mem_cache.memory_pool import MHATokenToKVPool, ReqToTokenPool
from sglang.srt.mem_cache.radix_cache import RadixCache, RadixKey
from sglang.test.ci.ci_register import register_cuda_ci
register_cuda_ci(est_time=5, suite="stage-b-test-small-1-gpu")
register_cuda_ci(est_time=5, suite="stage-b-test-1-gpu-small")
class TestSLRUAccuracy(unittest.TestCase):
@@ -21,8 +21,8 @@ from sglang.srt.mem_cache.common import available_and_evictable_str
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
# CPU-based unit test, runs quickly on any GPU runner
register_cuda_ci(est_time=5, suite="stage-b-test-small-1-gpu")
register_amd_ci(est_time=5, suite="stage-b-test-small-1-gpu-amd")
register_cuda_ci(est_time=5, suite="stage-b-test-1-gpu-small")
register_amd_ci(est_time=5, suite="stage-b-test-1-gpu-small-amd")
import random
import time
@@ -17,8 +17,8 @@ from sglang.srt.mem_cache.swa_radix_cache import SWARadixCache
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=8, suite="stage-b-test-large-1-gpu")
register_amd_ci(est_time=10, suite="stage-b-test-small-1-gpu-amd")
register_cuda_ci(est_time=8, suite="stage-b-test-1-gpu-large")
register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
class TestSWA(unittest.TestCase):